M30626FJPGP#D5C Renesas Electronics America, M30626FJPGP#D5C Datasheet

MCU 3/5V 512K 100-LQFP

M30626FJPGP#D5C

Manufacturer Part Number
M30626FJPGP#D5C
Description
MCU 3/5V 512K 100-LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/60r
Datasheet

Specifications of M30626FJPGP#D5C

Core Processor
M16C/60
Core Size
16-Bit
Speed
24MHz
Connectivity
I²C, IEBus, UART/USART
Peripherals
DMA, WDT
Number Of I /o
85
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
31K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 26x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
100-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
To our customers,
Corporation, and Renesas Electronics Corporation took over all the business of both
companies. Therefore, although the old company name remains in this document, it is a valid
Renesas Electronics document. We appreciate your understanding.
Issued by: Renesas Electronics Corporation (http://www.renesas.com)
Send any inquiries to http://www.renesas.com/inquiry.
On April 1
st
, 2010, NEC Electronics Corporation merged with Renesas Technology
Renesas Electronics website:
Old Company Name in Catalogs and Other Documents
http://www.renesas.com
April 1
Renesas Electronics Corporation
st
, 2010

Related parts for M30626FJPGP#D5C

M30626FJPGP#D5C Summary of contents

Page 1

To our customers, Old Company Name in Catalogs and Other Documents st On April 1 , 2010, NEC Electronics Corporation merged with Renesas Technology Corporation, and Renesas Electronics Corporation took over all the business of both companies. Therefore, although the ...

Page 2

All information included in this document is current as of the date this document is issued. Such information, however, is subject to change without any prior notice. Before purchasing or using any Renesas Electronics products listed herein, please confirm ...

Page 3

M16C/60, M16C/20, M16C/Tiny 16 Series Software Manual RENESAS 16-BIT SINGLE-CHIP MICROCOMPUTER All information contained in these materials, including products and product specifications, represents information on the product at the time of publication and is subject to change by Renesas Electronics ...

Page 4

Keep safety first in your circuit designs! Renesas Technology Corporation puts the maximum effort into making semiconductor prod- 1. ucts better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may ...

Page 5

This manual is written for the M16C/60, M16C/20, M16C/Tiny series software. This manual can be used for all types of microcomputers having the M16C/60 series CPU core. The reader of this manual is expected to have the basic knowledge of ...

Page 6

M16C Family Documents The following documents were prepared for the M16C family. Document Short Sheet Data Sheet Hardware Manual Software Manual Application Note Technical Update NOTES : 1. Before using this material, please visit the our website to confirm that ...

Page 7

...

Page 8

Chapter 2 Addressing Modes ___________________________________________ 2.1 Addressing Modes ................................................................................................................ 22 2.1.1 General instruction addressing ......................................................................................... 22 2.1.2 Special instruction addressing .......................................................................................... 22 2.1.3 Bit instruction addressing .................................................................................................. 22 2.2 Guide to This Chapter ........................................................................................................... 23 2.3 General Instruction Addressing ............................................................................................ ...

Page 9

Quick Reference in Alphabetic Order See page for Mnemonic function ABS 39 ADC 40 ADCF 41 ADD 42 ADJNZ 44 AND 45 BAND 47 BCLR 48 BM Cnd 49 BMEQ/Z 49 BMGE 49 BMGEU/C 49 BMGT 49 BMGTU 49 BMLE ...

Page 10

Quick Reference in Alphabetic Order See page for Mnemonic function MOV Dir MOVHH MOVHL MOVLH MOVLL MUL MULU NEG NOP NOT 100 OR 101 POP 103 POPC 104 POPM 105 PUSH 106 PUSHA 107 PUSHC 108 PUSHM 109 REIT 110 ...

Page 11

Quick Reference by Function Function Mnemonic Transfer MOV MOVA MOVDir POP POPM PUSH PUSHA PUSHM LDE STE STNZ STZ STZX XCHG Bit BAND manipulation BCLR BM Cnd BNAND BNOR BNOT BNTST BNXOR BOR BSET BTST BTSTC BTSTS BXOR Shift ROLC ...

Page 12

Quick Reference by Function Function Mnemonic Arithmetic DADD DEC DIV DIVU DIVX DSBB DSUB EXTS INC MUL MULU NEG RMPA SBB SUB Logical AND NOT OR TST XOR Jump ADJNZ SBJNZ JCnd JMP JMPI JMPS JSR JSRI JSRS RTS String ...

Page 13

Quick Reference by Function Function Mnemonic Other LDCTX LDINTB LDIPL NOP POPC PUSHC REIT STC STCTX UND WAIT Content Restore context Transfer to INTB register Set interrupt enable level No operation Restore control register Save control register Return from interrupt ...

Page 14

Quick Reference by Addressing (general instruction addressing) Mnemonic ABS ADC ADCF *1 ADD *1 ADJNZ AND CMP DADC DADD DEC DIV DIVU DIVX DSBB DSUB ENTER *2 EXTS *3 *4 INC INT *1 JMPI JMPS *1 JSRI JSRS *1 LDC ...

Page 15

Quick Reference by Addressing (general instruction addressing) Mnemonic LDINTB LDIPL *1 MOV MOVA MOV Dir MUL MULU NEG NOT OR POP *1 POPM PUSH PUSHA *1 PUSHM ROLC RORC ROT SBB *1 SBJNZ *1 SHA *1 SHL *1 STC *1 ...

Page 16

Quick Reference by Addressing (general instruction addressing) Mnemonic STNZ STZ STZX SUB TST XCHG XOR Addressing Quick Reference-8 See page See page for for function instruction code /number of cycles 126 237 127 237 128 238 129 238 131 241 ...

Page 17

Quick Reference by Addressing (special instruction addressing) Mnemonic *1 ADD *1 ADJNZ JCnd JMP *1 JMPI JSR *1 JSRI *1 LDC LDCTX *1 LDE *1 MOV POPC *1 POPM PUSHC *1 PUSHM *1 SBJNZ *1 SHA *1 SHL *1 STC ...

Page 18

Quick Reference by Addressing (bit instruction addressing) Mnemonic BAND BCLR BM Cnd BNAND BNOR BNOT BNTST BNXOR BOR BSET BTST BTSTC BTSTS BXOR FCLR FSET Addressing See page for function Quick Reference-10 See page for instruction code /number of cycles ...

Page 19

...

Page 20

Features of M16C/60, M16C/20, M16C/Tiny series 1.1.1 Features of M16C/60, M16C/20, M16C/Tiny series • Register configuration • Versatile instruction set • 1M-byte linear address space • Fast instruction execution time 1.1.2 Speed performance ...

Page 21

Address Space ...

Page 22

Chapter 1 Overview 1.3 Register Configuration The central processing unit (CPU) contains the 13 registers shown in Figure 1.3.1. Of these registers, R0, R1, R2, R3, A0, A1, and FB each consist of two sets of registers configuring two register ...

Page 23

Chapter 1 Overview 1.3.2 Address registers (A0 and A1) The address registers (A0 and A1) consist of 16 bits, and have the similar functions as the data regis- ters. These registers are used for address register-based indirect addressing and address ...

Page 24

Chapter 1 Overview 1.4 Flag Register (FLG) Figure 1.4.1 shows a configuration of the flag register (FLG). The function of each flag is detailed below. 1.4.1 Bit 0: Carry flag (C flag) This flag holds a carry, borrow, or shifted-out ...

Page 25

Chapter 1 Overview 1.4.10 Bits 12-14: Processor interrupt priority level (IPL) The processor interrupt priority level (IPL) consists of three bits, allowing you to specify eight processor interrupt priority levels from level 0 to level requested interrupt’s ...

Page 26

Chapter 1 Overview 1.5 Register Bank The M16C has two register banks, each configured with data registers (R0, R1, R2, and R3), address registers (A0 and A1), and frame base register (FB). These two register banks are switched over by ...

Page 27

Chapter 1 Overview 1.6 Internal State after Reset is Cleared The following lists the content of each register after a reset is cleared. • Data registers (R0, R1, R2, and R3): 0000 • Address registers (A0 and A1): 0000 • ...

Page 28

Chapter 1 Overview 1.7 Data Types There are four data types: integer, decimal, bit, and string. 1.7.1 Integer An integer can be a signed or an unsigned integer. A negative value of a signed integer is represented by two’s complement. ...

Page 29

Chapter 1 Overview 1.7.2 Decimal This type of data can be used in DADC, DADD, DSBB, and DSUB. Pack format (2 digits) Pack format (4 digits) Figure 1.7.2 Decimal data b7 b0 b15 b0 11 1.7 Data Types ...

Page 30

Chapter 1 Overview 1.7.3 Bits Register bits Figure 1.7.3 shows register bit specification. Register bits can be specified by register direct (bit bit, An). Use bit specify a bit in data register (Rn); use bit, An ...

Page 31

Chapter 1 Overview (1) Bit specification by bit, base Figure 1.7.5 shows the relationship between memory map and bit map. Memory bits can be handled as an array of consecutive bits. Bits can be specified by a given combina- tion ...

Page 32

Chapter 1 Overview (2) SB/FB relative bit specification For SB/FB-based relative addressing, use bit 0 of the address that is the sum of the address set to static base register (SB) or frame base register (FB) plus the address set ...

Page 33

Chapter 1 Overview 1.7.4 String String is a type of data that consists of a given length of consecutive byte (8-bit) or word (16-bit) data. This data type can be used in three types of string instructions: character string backward ...

Page 34

Chapter 1 Overview 1.8 Data Arrangement 1.8.1 Data Arrangement in Register Figure 1.8.1 shows the relationship between a register’s data size and bit numbers. Nibble (4-bit) data Byte (8-bit) data Word (16-bit) data Long word (32-bit) data Figure 1.8.1 Data ...

Page 35

Chapter 1 Overview 1.8.2 Data Arrangement in Memory Figure 1.8.2 shows data arrangement in memory. Figure 1.8.3 shows some examples of operation N+1 N+2 N+3 Byte (8-bit) data b7 N N+1 N+2 N+3 20-bit (Address) data Figure 1.8.2 ...

Page 36

Chapter 1 Overview 1.9 Instruction Format The instruction format can be classified into four types: generic, quick, short, and zero. The number of instruction bytes that can be chosen by a given format is least for the zero format, and ...

Page 37

Chapter 1 Overview 1.10 Vector Table The vector table comes in two types: a special page vector table and an interrupt vector table. The special page vector table is a fixed vector table. The interrupt vector table can be a ...

Page 38

Chapter 1 Overview 1.10.2 Variable Vector Table The variable vector table is an address-variable vector table. Specifically, this vector table is a 256-byte interrupt vector table that uses the value indicated by the interrupt table register (INTB) as the entry ...

Page 39

Addressing Modes 2.1 Addressing Modes 2.2 Guide to This Chapter 2.3 General Instruction Addressing 2.4 Special Instruction Addressing 2.5 Bit Instruction Addressing Chapter 2 ...

Page 40

Chapter 2 Addressing Modes 2.1 Addressing Modes This section describes addressing mode-representing symbols and operations for each addressing mode. The M16C/60, M16C/20, M16C/Tiny series have three addressing modes outlined below. 2.1.1 General instruction addressing This addressing accesses an area from ...

Page 41

Chapter 2 Addressing Modes 2.2 Guide to This Chapter The following shows how to read this chapter using an actual example. (1) Address register relative The value indicated by displacement dsp:8[A0] (dsp) plus the content of address (2) dsp:8[A1] register ...

Page 42

Chapter 2 Addressing Modes 2.3 General Instruction Addressing Immediate The immediate data indicated by #IMM #IMM is the object to be operated on. #IMM8 #IMM16 #IMM20 Register direct The specified register is the object to R0L be operated on. R0H ...

Page 43

Chapter 2 Addressing Modes Address register relative The value indicated by displacement dsp:8[A0] (dsp) plus the content of address dsp:8[A1] register (A0/A1)—added not including dsp:16[A0] the sign bits—constitutes the effective address to be operated on. dsp:16[A1] However, if the addition ...

Page 44

Chapter 2 Addressing Modes Stack pointer relative dsp:8[SP] The address indicated by the content of stack pointer (SP) plus the value indicated by displacement (dsp)—added including the sign bits—constitutes the effective address to be operated on. The stack pointer (SP) ...

Page 45

Chapter 2 Addressing Modes 2.4 Special Instruction Addressing 20-bit absolute The value indicated by abs20 constitutes abs20 the effective address to be operated on. The effective address range is 00000 FFFFF . 16 This addressing can be used in LDE, ...

Page 46

Chapter 2 Addressing Modes 32-bit register direct The 32-bit concatenated register content of two R2R0 specified registers is the object to be operated R3R1 on. A1A0 This addressing can be used in SHL, SHA, JMPI, and JSRI instructions. The following ...

Page 47

Chapter 2 Addressing Modes Program counter relative • If the jump length specifier (.length) label is (.S)... the base address plus the value indicated by displacement (dsp)— added not including the sign bits— constitutes the effective address. This addressing can ...

Page 48

Chapter 2 Addressing Modes 2.5 Bit Instruction Addressing This addressing can be used in the following instructions: BCLR, BSET, BNOT, BTST, BNTST, BAND, BNAND, BOR, BNOR, BXOR, BNXOR, BM Cnd , BTSTS, BTSTC Register direct The specified register bit is ...

Page 49

Chapter 2 Addressing Modes Address register relative base:8[A0] The bit that is as much away from bit 0 at the address indi- base:8[A1] cated by base as the number of base:16[A0] bits indicated by address register (A0/A1) is the object ...

Page 50

Chapter 2 Addressing Modes FB relative The bit that is as much away from bit 0 at bit,base:8[FB] the address indicated by frame base register (FB) plus the value indicated by base (added including the sign bit) as the number ...

Page 51

Guide to This Chapter 3.2 Functions Chapter 3 Functions ...

Page 52

Chapter 3 Functions 3.1 Guide to This Chapter This chapter describes the functionality of each instruction by showing syntax, operation, function, select- able src/dest, flag changes, description examples, and related instructions. The following shows how to read this chapter by ...

Page 53

Chapter 3 Functions (1) Mnemonic Indicates the mnemonic explained in this page. (2) Instruction code/Number of Cycles Indicates the page in which instruction code/number of cycles is listed. Refer to this page for instruction code and number of cycles. (3) ...

Page 54

Chapter 3 Functions Chapter 3 Functions MOV (1) (2) [ Syntax ] (3) MOV.size (:format) src,dest (4) [ Operation ] dest src [ Function ] (5) This instruction transfers src to dest . • • If dest is an address ...

Page 55

Chapter 3 Functions (4) Operation Explains the operation of the instruction using symbols. (5) Function Explains the function of the instruction and precautions to be taken when using the instruction. (6) Selectable src / dest (label) If the instruction has ...

Page 56

Chapter 3 Functions The following explains the syntax of each jump instruction—JMP, JPMI, JSR, and JSRI by using an actual example. Chapter 3 Functions JMP (1) (2) [ Syntax ] (3) JMP (.length) label (3) Syntax Indicates the instruction syntax ...

Page 57

Chapter 3 Functions ABS [ Syntax ] ABS.size dest [ Operation ] dest dest [ Function ] • This instruction takes on an absolute value of dest and stores it in dest . [ Selectable dest ] [ Flag Change ...

Page 58

Chapter 3 Functions ADC [ Syntax ] ADC.size src,dest [ Operation ] dest src + dest + [ Function ] • This instruction adds dest , src , and C flag together and stores the result in dest . • ...

Page 59

Chapter 3 Functions ADCF [ Syntax ] ADCF.size dest [ Operation ] dest dest + C [ Function ] This instruction adds dest and C flag together and stores the result in dest . [ Selectable dest ] [ Flag ...

Page 60

Chapter 3 Functions ADD [ Syntax ] ADD.size (:format) src,dest [ Operation ] dest dest + src [ Function ] • This instruction adds dest and src together and stores the result in dest . • If dest is an ...

Page 61

Chapter 3 Functions [src/dest Classified by Format] G format src R0L/R0 R0H/R1 R1L/ A0/A0 A1/A1 [A0] dsp:8[A0] dsp:8[A1] dsp:8[SB] dsp:16[A0] dsp:16[A1] dsp:16[SB] dsp:20[A0] dsp:20[A1] abs20 R2R0 R3R1 A1A0 *1 If you specify (.B) for the size specifier (.size), ...

Page 62

Chapter 3 Functions ADJNZ [ Syntax ] ADJNZ.size src,dest,label [ Operation ] dest dest + src if dest 0 then jump label [ Function ] • This instruction adds dest and src together and stores the result in dest . ...

Page 63

Chapter 3 Functions AND [ Syntax ] AND.size (:format) src,dest [ Operation ] dest src dest [ Function ] • This instruction logically ANDs dest and src together and stores the result in dest . • If dest is an ...

Page 64

Chapter 3 Functions [src/dest Classified by Format] G format src R0L/R0 R0H/R1 R1L/ A0/A0 A1/A1 [A0] dsp:8[A0] dsp:8[A1] dsp:8[SB] dsp:16[A0] dsp:16[A1] dsp:16[SB] dsp:20[A0] dsp:20[A1] abs20 R2R0 R3R1 A1A0 *1 If you specify (.B) for the size specifier (.size), ...

Page 65

Chapter 3 Functions BAND [ Syntax ] BAND src [ Operation ] C src C [ Function ] • This instruction logically ANDs the C flag and src together and stores the result in the C flag. [ Selectable src ...

Page 66

Chapter 3 Functions BCLR [ Syntax ] BCLR (:format) dest [ Operation ] dest 0 [ Function ] • This instruction stores 0 in dest . [ Selectable dest ] [ Flag Change ] Flag ...

Page 67

Chapter 3 Functions BM Cnd [ Syntax ] BM Cnd dest [ Operation ] if true then dest 1 else dest 0 [ Function ] • This instruction transfers the true or false value of the condition indicated by Cnd ...

Page 68

Chapter 3 Functions BNAND [ Syntax ] BNAND src [ Operation ] ______ C src C [ Function ] • This instruction logically ANDs the C flag and inverted src together and stores the result in the C flag. [ ...

Page 69

Chapter 3 Functions BNOR [ Syntax ] BNOR src [ Operation ] ______ C src C [ Function ] • This instruction logically ORs the C flag and inverted src together and stores the result in the C flag. [ ...

Page 70

Chapter 3 Functions BNOT [ Syntax ] BNOT(:format) dest [ Operation ] ________ dest dest [ Function ] • This instruction inverts dest and stores the result in dest . [ Selectable dest ] [ Flag Change ] Flag U ...

Page 71

Chapter 3 Functions BNTST [ Syntax ] BNTST src [ Operation ] Z src ______ C src [ Function ] • This instruction transfers inverted src to the Z flag and inverted src to the C flag. [ Selectable src ...

Page 72

Chapter 3 Functions BNXOR [ Syntax ] BNXOR src [ Operation ] ______ A C src C [ Function ] • This instruction exclusive ORs the C flag and inverted src and stores the result in the C flag. [ ...

Page 73

Chapter 3 Functions BOR [ Syntax ] BOR src [ Operation ] C src C [ Function ] • This instruction logically ORs the C flag and src together and stores the result in the C flag. [ Selectable src ...

Page 74

Chapter 3 Functions BRK [ Syntax ] BRK [ Operation ] SP SP – 2 M(SP) ( FLG – 2 M(SP) ( M(FFFE4 ) 16 [ Function ] • This ...

Page 75

Chapter 3 Functions BSET [ Syntax ] BSET (:format) dest [ Operation ] dest 1 [ Function ] • This instruction stores 1 in dest . [ Selectable dest ] [ Flag Change ] Flag ...

Page 76

Chapter 3 Functions BTST [ Syntax ] BTST (:format) src [ Operation ] ______ Z src C src [ Function ] • This instruction transfers inverted src to the Z flag and non-inverted src to the C flag. [ Selectable ...

Page 77

Chapter 3 Functions BTSTC [ Syntax ] BTSTC dest [ Operation ] ________ Z dest C dest dest 0 [ Function ] • This instruction transfers inverted dest to the Z flag and non-inverted dest to the C flag. Then ...

Page 78

Chapter 3 Functions BTSTS [ Syntax ] BTSTS dest [ Operation ] ________ Z dest C dest dest 1 [ Function ] • This instruction transfers inverted dest to the Z flag and non-inverted dest to the C flag. Then ...

Page 79

Chapter 3 Functions BXOR [ Syntax ] BXOR src [ Operation ] A C src C [ Function ] • This instruction exclusive ORs the C flag and src together and stores the result in the C flag. [ Selectable ...

Page 80

Chapter 3 Functions CMP [ Syntax ] CMP.size (:format) src,dest [ Operation ] dest – src [ Function ] • Each flag bit of the flag register varies depending on the result of subtraction of src from dest . • ...

Page 81

Chapter 3 Functions [src/dest Classified by Format] G format src R0L/R0 R0H/R1 R1L/ A0/A0 A1/A1 [A0] dsp:8[A0] dsp:8[A1] dsp:8[SB] dsp:16[A0] dsp:16[A1] dsp:16[SB] dsp:20[A0] dsp:20[A1] abs20 R2R0 R3R1 A1A0 *1 If you specify (.B) for the size specifier (.size), ...

Page 82

Chapter 3 Functions DADC [ Syntax ] DADC.size src,dest [ Operation ] dest src + dest + [ Function ] • This instruction adds dest , src , and C flag together in decimal and stores the result in dest ...

Page 83

Chapter 3 Functions DADD [ Syntax ] DADD.size src,dest [ Operation ] dest src + dest [ Function ] • This instruction adds dest and src together in decimal and stores the result in dest . [ Selectable src/dest ] ...

Page 84

Chapter 3 Functions DEC [ Syntax ] DEC.size dest [ Operation ] dest dest – Function ] • This instruction decrements 1 from dest and stores the result in dest . [ Selectable dest ] [ Flag Change ...

Page 85

Chapter 3 Functions DIV [ Syntax ] DIV.size src [ Operation ] If the size specifier (.size) is (.B) R0L (quotient), R0H (remainder) If the size specifier (.size) is (.W) R0 (quotient), R2 (remainder) [ Function ] • This instruction ...

Page 86

Chapter 3 Functions DIVU [ Syntax ] DIVU.size src [ Operation ] If the size specifier (.size) is (.B) R0L (quotient), R0H (remainder) If the size specifier (.size) is (.W) R0 (quotient), R2 (remainder) [ Function ] • This instruction ...

Page 87

Chapter 3 Functions DIVX [ Syntax ] DIVX.size src [ Operation ] If the size specifier (.size) is (.B) R0L (quotient), R0H (remainder) If the size specifier (.size) is (.W) R0 (quotient), R2 (remainder) [ Function ] • This instruction ...

Page 88

Chapter 3 Functions DSBB [ Syntax ] DSBB.size src,dest [ Operation ] dest dest – src – [ Function ] • This instruction subtracts src and inverted C flag from dest in decimal and stores the result in dest . ...

Page 89

Chapter 3 Functions DSUB [ Syntax ] DSUB.size src,dest [ Operation ] dest dest – src [ Function ] • This instruction subtracts src from dest in decimal and stores the result in dest . [ Selectable src/dest ] src ...

Page 90

Chapter 3 Functions ENTER [ Syntax ] ENTER src [ Operation ] SP SP – M(SP – [ Function ] • This instruction generates a stack frame. src represents the size of the stack frame. ...

Page 91

Chapter 3 Functions EXITD [ Syntax ] EXITD [ Operation ] M(SP M(SP M(SP Function ] • This instruction deallocates the stack frame ...

Page 92

Chapter 3 Functions EXTS [ Syntax ] EXTS.size dest [ Operation ] dest EXT(dest) [ Function ] • This instruction sign extends dest and stores the result in dest . • If you selected (.B) for the size specifier (.size), ...

Page 93

Chapter 3 Functions FCLR [ Syntax ] FCLR dest [ Operation ] dest 0 [ Function ] • This instruction stores 0 in dest . [ Selectable dest ] [ Flag Change ] Flag Change ...

Page 94

Chapter 3 Functions FSET [ Syntax ] FSET dest [ Operation ] dest 1 [ Function ] • This instruction stores 1 in dest . [ Selectable dest ] [ Flag Change ] Flag Change ...

Page 95

Chapter 3 Functions INC [ Syntax ] INC.size dest [ Operation ] dest dest + 1 [ Function ] • This instruction adds 1 to dest and stores the result in dest . [ Selectable dest ] [ Flag Change ...

Page 96

Chapter 3 Functions INT [ Syntax ] INT src [ Operation ] SP SP – 2 M(SP) ( FLG – 2 M(SP) ( M(IntBase + [ Function ] • This ...

Page 97

Chapter 3 Functions INTO [ Syntax ] INTO [ Operation ] SP SP – 2 M(SP) ( FLG – 2 M(SP) ( M(FFFE0 ) 16 [ Function ] • If ...

Page 98

Chapter 3 Functions J Cnd [ Syntax ] J Cnd label [ Operation ] if true then jump label [ Function ] • This instruction causes program flow to branch off after checking the execution result of the preceding instruction ...

Page 99

Chapter 3 Functions JMP [ Syntax ] JMP(.length) label [ Operation ] PC label [ Function ] • This instruction causes control to jump to label. [ Selectable label ] .length label . label ...

Page 100

Chapter 3 Functions JMPI [ Syntax ] JMPI.length src [ Operation ] When jump distance specifier (.length src [ Function ] • This instruction causes control to jump to the address indicated by src . If ...

Page 101

Chapter 3 Functions JMPS [ Syntax ] JMPS src [ Operation ] FFFFE ML [ Function ] • This instruction causes control to jump to the address set in each table of the special ...

Page 102

Chapter 3 Functions JSR [ Syntax ] JSR(.length) label [ Operation ] SP SP – M(SP) ( – M(SP) ( label *1 n denotes the number of instruction bytes. [ Function ] • This instruction ...

Page 103

Chapter 3 Functions JSRI [ Syntax ] JSRI.length src [ Operation ] When jump distance specifier (.length – 1 M(SP) ( – 2 M(SP) ( src *1 n ...

Page 104

Chapter 3 Functions JSRS [ Syntax ] JSRS src [ Operation ] SP SP – M(SP) ( – M(SP) ( FFFFE ML [ Function ] • This instruction causes ...

Page 105

Chapter 3 Functions LDC [ Syntax ] LDC src,dest [ Operation ] dest src [ Function ] • This instruction transfers src to the control register indicated by dest . If src is memory, the required memory capacity is 2 ...

Page 106

Chapter 3 Functions LDCTX [ Syntax ] LDCTX abs16,abs20 [ Function ] • This instruction restores task context from the stack area. • Set the RAM address that contains the task number in abs16 and the start address of table ...

Page 107

Chapter 3 Functions LDE [ Syntax ] LDE.size src,dest [ Operation ] dest src [ Function ] • This instruction transfers src from extended area to dest . • If dest when the size specifier ...

Page 108

Chapter 3 Functions LDINTB [ Syntax ] LDINTB src [ Operation ] INTBHL src [ Function ] • This instruction transfers src to INTB. • The LDINTB instruction is a macro-instruction consisting of the following: LDC LDC [ Selectable src ...

Page 109

Chapter 3 Functions LDIPL [ Syntax ] LDIPL src [ Operation ] IPL src [ Function ] • This instruction transfers src to IPL. [ Selectable src ] src *1 #IMM *1 The range of values that can be taken ...

Page 110

Chapter 3 Functions MOV [ Syntax ] MOV.size (:format) src,dest [ Operation ] dest src [ Function ] • This instruction transfers src to dest . • If dest when the size specifier (.size) you ...

Page 111

Chapter 3 Functions [src/dest Classified by Format] G format src R0L/R0 R0H/R1 R1L/R2 A0/A0 *1 A1/A1 *1 [A0] dsp:8[A0] dsp:8[A1] dsp:8[SB] dsp:16[A0] dsp:16[A1] dsp:16[SB] dsp:20[A0] dsp:20[A1] abs20 R2R0 R3R1 A1A0 *1 If you specify (.B) for the size specifier (.size), ...

Page 112

Chapter 3 Functions MOVA [ Syntax ] MOVA src,dest [ Operation ] dest EVA(src) [ Function ] • This instruction transfers the affective address of src to dest . [ Selectable src/dest ] src R0L/R0 R0H/R1 R1L/R2 A0/A0 A1/A1 [A0] ...

Page 113

Chapter 3 Functions MOV Dir [ Syntax ] MOV Dir src,dest [ Operation ] Dir Operation HH H4:dest H4:src HL L4:dest H4:src LH H4:dest L4:src LL L4:dest L4:src [ Function ] • Be sure to choose R0L for either src ...

Page 114

Chapter 3 Functions MUL [ Syntax ] MUL.size src,dest [ Operation ] dest dest src [ Function ] • This instruction multiplies src and dest together including the sign bits and stores the result in dest . • If you ...

Page 115

Chapter 3 Functions MULU [ Syntax ] MULU.size src,dest [ Operation ] dest dest src [ Function ] • This instruction multiplies src and dest together not including the sign bits and stores the result in dest . • If ...

Page 116

Chapter 3 Functions NEG [ Syntax ] NEG.size dest [ Operation ] dest 0 – dest [ Function ] • This instruction takes the 2’s complement of dest and stores the result in dest . [ Selectable dest ] [ ...

Page 117

Chapter 3 Functions NOP [ Syntax ] NOP [ Operation ] Function ] • This instruction adds 1 to PC. [ Flag Change ] Flag Change [ Description Example ] ...

Page 118

Chapter 3 Functions NOT [ Syntax ] NOT.size (:format) dest [ Operation ] ________ dest dest [ Function ] • This instruction inverts dest and stores the result in dest . [ Selectable dest ] [ Flag Change ] Flag ...

Page 119

Chapter 3 Functions OR [ Syntax ] OR.size (:format) src,dest [ Operation ] dest src dest [ Function ] • This instruction logically ORs dest and src together and stores the result in dest . • If dest is an ...

Page 120

Chapter 3 Functions [src/dest Classified by Format] G format src R0L/R0 R0H/R1 R1L/ A0/A0 A1/A1 [A0] dsp:8[A0] dsp:8[A1] dsp:8[SB] dsp:16[A0] dsp:16[A1] dsp:16[SB] dsp:20[A0] dsp:20[A1] abs20 R2R0 R3R1 A1A0 *1 If you specify (.B) for the size specifier (.size), ...

Page 121

Chapter 3 Functions POP [ Syntax ] POP.size (:format) dest [ Operation ] If the size specifier (.size) is (.B) dest M(SP Function ] • This instruction restores dest from the stack area. [ Selectable ...

Page 122

Chapter 3 Functions POPC [ Syntax ] POPC dest [ Operation ] dest M(SP When dest when the U flag = “0” and dest is ISP, the value 2 is not ...

Page 123

Chapter 3 Functions POPM [ Syntax ] POPM dest [ Operation ] dest M(SP Number of registers to be restored [ Function ] • This instruction restores the registers selected by dest collectively from ...

Page 124

Chapter 3 Functions PUSH [ Syntax ] PUSH.size (:format) src [ Operation ] If the size specifier (.size – 1 M(SP) src [ Function ] • This instruction saves src to the stack area. [ Selectable ...

Page 125

Chapter 3 Functions PUSHA [ Syntax ] PUSHA src [ Operation ] SP SP – 2 M(SP) EVA(src) [ Function ] • This instruction saves the effective address of src to the stack area. [ Selectable src ] src R0L/R0 ...

Page 126

Chapter 3 Functions PUSHC [ Syntax ] PUSHC src [ Operation ] SP SP – 2 M(SP) src *1 *1 When src when the U flag = “0” and src is ISP, the SP before being subtracted ...

Page 127

Chapter 3 Functions PUSHM [ Syntax ] PUSHM src [ Operation ] SP SP – M(SP) src *1 Number of registers saved. [ Function ] • This instruction saves the registers selected by src collectively to the stack ...

Page 128

Chapter 3 Functions REIT [ Syntax ] REIT [ Operation ] PC M(SP FLG M(SP Function ] • This instruction restores the PC and FLG that were saved when ...

Page 129

Chapter 3 Functions RMPA [ Syntax ] RMPA.size *1 [ Operation ] Repeat *2 R2R0(R0 Until you set a value 0 in R3, this instruction is ingored Shown in ( ...

Page 130

Chapter 3 Functions ROLC [ Syntax ] ROLC.size dest [ Operation ] [ Function ] • This instruction rotates dest one bit to the left including the C flag. [ Selectable dest ] [ Flag Change ] Flag U I ...

Page 131

Chapter 3 Functions RORC [ Syntax ] RORC.size dest [ Operation ] [ Function ] • This instruction rotates dest one bit to the right including the C flag. [ Selectable dest ] [ Flag Change ] Flag U I ...

Page 132

Chapter 3 Functions ROT [ Syntax ] ROT.size src,dest [ Operation ] C [ Function ] • This instruction rotates dest left or right the number of bits indicated by src . The bit overflowing from LSB (MSB) is transferred ...

Page 133

Chapter 3 Functions RTS [ Syntax ] RTS [ Operation ] PC M(SP M(SP Function ] • This instruction causes control to return from a subroutine. [ Flag ...

Page 134

Chapter 3 Functions SBB [ Syntax ] SBB.size src,dest [ Operation ] dest dest – src – [ Function ] • This instruction subtracts src and inverted C flag from dest and stores the result in dest . • If ...

Page 135

Chapter 3 Functions SBJNZ [ Syntax ] SBJNZ.size src,dest,label [ Operation ] dest dest – src if dest 0 then jump label [ Function ] • This instruction subtracts src from dest and stores the result in dest . • ...

Page 136

Chapter 3 Functions SHA [ Syntax ] SHA.size src,dest [ Operation ] When src < 0 When src > Function ] overflowing from LSB (MSB) is transferred to the C flag. • The direction of shift is determined ...

Page 137

Chapter 3 Functions SHL [ Syntax ] SHL.size src,dest [ Operation ] When src < 0 When src > Function ] • This instruction logically shifts dest left or right the number of bits indicated by src . ...

Page 138

Chapter 3 Functions SMOVB [ Syntax ] SMOVB.size *1 [ Operation ] When size specifier (.size) is (.B) Repeat M(A1) M Until you set a value 0 in ...

Page 139

Chapter 3 Functions SMOVF [ Syntax ] SMOVF.size *1 [ Operation ] When size specifier (.size) is (.B) Repeat M(A1) M(2 * Until you set a value 0 in ...

Page 140

Chapter 3 Functions SSTR [ Syntax ] SSTR.size *1 [ Operation ] When size specifier (.size) is (.B) Repeat M(A1) R0L Until you set a value 0 in R3, this instruction is ingored. ...

Page 141

Chapter 3 Functions STC [ Syntax ] STC src,dest [ Operation ] dest src [ Function ] • This instruction transfers the control register indicated by src to dest . If dest is memory, specify the address in which to ...

Page 142

Chapter 3 Functions STCTX [ Syntax ] STCTX abs16,abs20 [ Operation ] [ Function ] • This instruction saves task context to the stack area. • Set the RAM address that contains the task number in abs16 and the start ...

Page 143

Chapter 3 Functions STE [ Syntax ] STE.size src,dest [ Operation ] dest src [ Function ] • This instruction transfers src to dest in an extended area. • If src when the size specifier ...

Page 144

Chapter 3 Functions STNZ [ Syntax ] STNZ src,dest [ Operation ] then dest src [ Function ] • This instruction transfers src to dest when the Z flag Selectable src/dest ] src ...

Page 145

Chapter 3 Functions STZ [ Syntax ] STZ src,dest [ Operation ] then dest src [ Function ] • This instruction transfers src to dest when the Z flag Selectable src/dest ] src ...

Page 146

Chapter 3 Functions STZX [ Syntax ] STZX src1,src2,dest [ Operation ] then dest src1 else dest src2 [ Function ] • This instruction transfers src1 to dest when the Z flag is 1. When the ...

Page 147

Chapter 3 Functions SUB [ Syntax ] SUB.size (:format) src,dest [ Operation ] dest dest – src [ Function ] • This instruction subtracts src from dest and stores the result in dest . • If dest ...

Page 148

Chapter 3 Functions [src/dest Classified by Format] G format src R0L/R0 R0H/R1 R1L/ A0/A0 A1/A1 [A0] dsp:8[A0] dsp:8[A1] dsp:8[SB] dsp:16[A0] dsp:16[A1] dsp:16[SB] dsp:20[A0] dsp:20[A1] abs20 R2R0 R3R1 A1A0 *1 If you specify (.B) for the size specifier (.size), ...

Page 149

Chapter 3 Functions TST [ Syntax ] TST.size src,dest [ Operation ] dest src [ Function ] • Each flag in the flag register changes state depending on the result of logical AND of src and dest . • If ...

Page 150

Chapter 3 Functions UND [ Syntax ] UND [ Operation ] SP SP – M(SP) ( – M(SP) ( M(FFFDC [ Function ] • This instruction generates an undefined instruction interrupt. • The undefined instruction ...

Page 151

Chapter 3 Functions WAIT [ Syntax ] WAIT [ Operation ] [ Function ] • This instruction halts program execution. Program execution is restarted when an interrupt of a higher priority level than IPL is acknowledged or a reset is ...

Page 152

Chapter 3 Functions XCHG [ Syntax ] XCHG.size src,dest [ Operation ] dest src [ Function ] • This instruction exchanges contents between src and dest . • If dest when the size specifier (.size) ...

Page 153

Chapter 3 Functions XOR [ Syntax ] XOR.size src,dest [ Operation ] dest dest src [ Function ] • This instruction exclusive ORs src and dest together and stores the result in dest . • If dest ...

Page 154

Chapter 3 Functions 136 3.2 Functions ...

Page 155

Instruction Code/Number of Cycles 4.1 Guide to This Chapter 4.2 Instruction Code/Number of Cycles Chapter 4 ...

Page 156

Chapter 4 Instruction Code 4.1 Guide to This Chapter This chapter describes instruction code and number of cycles for each op-code. The following shows how to read this chapter by using an actual page as an example. Chapter 4 Instruction ...

Page 157

Chapter 4 Instruction Code (1) Mnemonic Shows the mnemonic explained in this page. (2) Syntax Shows an instruction syntax using symbols. (3) Instruction code Shows instruction code. Entered are omitted depending on src/dest you selected. Content at ...

Page 158

Chapter 4 Instruction Code/Number of Cycles ABS (1) ABS.size dest SIZE 1 .size SIZE . [An] [ Number of Bytes/Number of Cycles ] dest Rn ...

Page 159

Chapter 4 Instruction Code/Number of Cycles (2) ADC.size src, dest SIZE .size SIZE . [An] [ Number of Bytes/Number of Cycles ] dest Rn An ...

Page 160

Chapter 4 Instruction Code/Number of Cycles ADCF (1) ADCF.size dest SIZE .size SIZE . [An] [ Number of Bytes/Number of Cycles ...

Page 161

Chapter 4 Instruction Code/Number of Cycles (2) ADD.size:Q #IMM, dest SIZE .size SIZE #IMM . [An] [ ...

Page 162

Chapter 4 Instruction Code/Number of Cycles ADD (3) ADD.B:S #IMM8, dest DEST dest R0H Rn R0L dsp:8[SB] dsp:8[SB/FB] dsp:8[FB] abs16 abs16 [ Number of Bytes/Number of Cycles ] dest Rn Bytes/Cycles 2/1 dest ...

Page 163

Chapter 4 Instruction Code/Number of Cycles (4) ADD.size:G src, dest SIZE .size SIZE . [An] [ Number of Bytes/Number of Cycles ] dest Rn An ...

Page 164

Chapter 4 Instruction Code/Number of Cycles ADD (5) ADD.B:S src, R0L/R0H DEST SRC src Rn R0L/R0H dsp:8[SB] dsp:8[SB/FB] dsp:8[FB] abs16 abs16 [ Number of Bytes/Number of Cycles ] src Rn Bytes/Cycles 1/2 ADD ...

Page 165

Chapter 4 Instruction Code/Number of Cycles (7) ADD.size:Q #IMM The instruction code is the same regardless of whether you selected (.B) or (.W) for the size ...

Page 166

Chapter 4 Instruction Code/Number of Cycles ADJNZ (1) ADJNZ.size #IMM, dest, label SIZE dsp8 (label code)= address indicated by label –(start address of instruction + 2) .size SIZE #IMM .B ...

Page 167

Chapter 4 Instruction Code/Number of Cycles (1) AND.size:G #IMM, dest SIZE .size SIZE . [An] [ Number of Bytes/Number of Cycles ...

Page 168

Chapter 4 Instruction Code/Number of Cycles AND (3) AND.size:G src, dest SIZE .size SIZE . [An] [ Number of Bytes/Number of Cycles ] dest Rn ...

Page 169

Chapter 4 Instruction Code/Number of Cycles (4) AND.B:S src, R0L/R0H DEST SRC src R0L/R0H Rn dsp:8[SB] dsp:8[SB/FB] dsp:8[FB] abs16 abs16 [ Number of Bytes/Number of Cycles ] src Rn Bytes/Cycles 1/2 src code ...

Page 170

Chapter 4 Instruction Code/Number of Cycles BAND (1) BAND src src bit,R0 bit,R1 bit,Rn bit,R2 bit,R3 bit,A0 bit,An bit,A1 [A0] [An] [A1] [ Number of ...

Page 171

Chapter 4 Instruction Code/Number of Cycles (2) BCLR:S bit, base:11[SB BIT [ Number of Bytes/Number of Cycles ] Bytes/Cycles 2/3 dest code dsp8 153 4.2 Instruction Code/Number of Cycles BCLR ...

Page 172

Chapter 4 Instruction Code/Number of Cycles BM Cnd (1) BM Cnd dest dest bit,R0 bit,R1 bit,Rn bit,R2 bit,R3 bit,A0 bit,An bit,A1 [A0] [An] [A1] Cnd ...

Page 173

Chapter 4 Instruction Code/Number of Cycles (2) BM Cnd Cnd CND Cnd GEU GTU ...

Page 174

Chapter 4 Instruction Code/Number of Cycles BNOR (1) BNOR src src bit,R0 bit,R1 bit,Rn bit,R2 bit,R3 bit,A0 bit,An bit,A1 [A0] [An] [A1] [ Number of ...

Page 175

Chapter 4 Instruction Code/Number of Cycles (2) BNOT:S bit, base:11[SB BIT [ Number of Bytes/Number of Cycles ] Bytes/Cycles 2/3 (1) BNTST src ...

Page 176

Chapter 4 Instruction Code/Number of Cycles BNXOR (1) BNXOR src src bit,R0 bit,R1 bit,Rn bit,R2 bit,R3 bit,A0 bit,An bit,A1 [A0] [An] [A1] [ Number of Bytes/Number of Cycles ...

Page 177

Chapter 4 Instruction Code/Number of Cycles (1) BRK Number of Bytes/Number of Cycles ] Bytes/Cycles 1/ you specify the target address of the BRK interrupt by use ...

Page 178

Chapter 4 Instruction Code/Number of Cycles BSET (2) BSET:S bit, base:11[SB BIT [ Number of Bytes/Number of Cycles ] Bytes/Cycles 2/3 BTST (1) BTST:G src ...

Page 179

Chapter 4 Instruction Code/Number of Cycles (2) BTST:S bit, base:11[SB BIT [ Number of Bytes/Number of Cycles ] Bytes/Cycles 2/3 (1) BTSTC dest ...

Page 180

Chapter 4 Instruction Code/Number of Cycles BTSTS (1) BTSTS dest dest bit,R0 bit,R1 bit,Rn bit,R2 bit,R3 bit,A0 bit,An bit,A1 [A0] [An] [A1] [ Number of ...

Page 181

Chapter 4 Instruction Code/Number of Cycles (1) CMP.size:G #IMM, dest SIZE .size SIZE . [An] [ Number of Bytes/Number of Cycles ...

Page 182

Chapter 4 Instruction Code/Number of Cycles CMP (2) CMP.size:Q #IMM, dest SIZE .size SIZE #IMM . [An] ...

Page 183

Chapter 4 Instruction Code/Number of Cycles (3) CMP.B:S #IMM8, dest DEST dest R0H Rn R0L dsp:8[SB] dsp:8[SB/FB] dsp:8[FB] abs16 abs16 [ Number of Bytes/Number of Cycles ] dest Rn Bytes/Cycles 2/1 dest code ...

Page 184

Chapter 4 Instruction Code/Number of Cycles CMP (4) CMP.size:G src, dest SIZE .size SIZE . [An] [ Number of Bytes/Number of Cycles ] dest Rn ...

Page 185

Chapter 4 Instruction Code/Number of Cycles (5) CMP.B:S src, R0L/R0H DEST SRC src R0L/R0H Rn dsp:8[SB] dsp:8[SB/FB] dsp:8[FB] abs16 abs16 [ Number of Bytes/Number of Cycles ] src Rn Bytes/Cycles 1/2 (1) DADC.B ...

Page 186

Chapter 4 Instruction Code/Number of Cycles DADC (2) DADC.W #IMM16 Number of Bytes/Number of Cycles ] Bytes/Cycles 4/5 DADC ...

Page 187

Chapter 4 Instruction Code/Number of Cycles (4) DADC.W R1 Number of Bytes/Number of Cycles ] Bytes/Cycles 2/5 (1) DADD.B ...

Page 188

Chapter 4 Instruction Code/Number of Cycles DADD (2) DADD.W #IMM16 Number of Bytes/Number of Cycles ] Bytes/Cycles 4/5 DADD ...

Page 189

Chapter 4 Instruction Code/Number of Cycles (4) DADD.W R1 Number of Bytes/Number of Cycles ] Bytes/Cycles 2/5 (1) DEC.B ...

Page 190

Chapter 4 Instruction Code/Number of Cycles DEC (2) DEC.W dest DEST dest DEST Number of Bytes/Number of Cycles ] Bytes/Cycles 1/1 DIV (1) DIV.size #IMM b7 ...

Page 191

Chapter 4 Instruction Code/Number of Cycles (2) DIV.size src SIZE .size SIZE . [An] [ Number of Bytes/Number of Cycles ] ...

Page 192

Chapter 4 Instruction Code/Number of Cycles DIVU (2) DIVU.size src SIZE 1 1 .size SIZE . [An] [ Number of Bytes/Number of Cycles ] src ...

Page 193

Chapter 4 Instruction Code/Number of Cycles (2) DIVX.size src SIZE .size SIZE . [An] [ Number of Bytes/Number of Cycles ] ...

Page 194

Chapter 4 Instruction Code/Number of Cycles DSBB (2) DSBB.W #IMM16 Number of Bytes/Number of Cycles ] Bytes/Cycles 4/4 DSBB (3) DSBB.B R0H, R0L ...

Page 195

Chapter 4 Instruction Code/Number of Cycles (4) DSBB.W R1 Number of Bytes/Number of Cycles ] Bytes/Cycles 2/4 (1) DSUB.B ...

Page 196

Chapter 4 Instruction Code/Number of Cycles DSUB (2) DSUB.W #IMM16 Number of Bytes/Number of Cycles ] Bytes/Cycles 4/4 DSUB (3) DSUB.B R0H, R0L ...

Page 197

Chapter 4 Instruction Code/Number of Cycles (4) DSUB.W R1 Number of Bytes/Number of Cycles ] Bytes/Cycles 2/4 (1) ENTER ...

Page 198

Chapter 4 Instruction Code/Number of Cycles EXITD (1) EXITD Number of Bytes/Number of Cycles ] Bytes/Cycles 2/9 EXTS (1) EXTS.B dest ...

Page 199

Chapter 4 Instruction Code/Number of Cycles (2) EXTS Number of Bytes/Number of Cycles ] Bytes/Cycles 2/3 (1) FCLR dest ...

Page 200

Chapter 4 Instruction Code/Number of Cycles FSET (1) FSET dest dest DEST ...

Related keywords