MCF54452VR266 Freescale Semiconductor, MCF54452VR266 Datasheet

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... DMA-supported serial peripheral interface (DSPI) • 3 UARTs 2 • bus interface This document contains information on a new product. Specifications and information herein are subject to change without notice. © Freescale Semiconductor, Inc., 2009. All rights reserved. MAPBGA–256 17mm x 17mm ® Document Number: MCF54455 Rev. 6, 10/2009 MCF54455 TEPBGA– ...

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... DSPI Timing Specifications . . . . . . . . . . . . . . . . . . . . . 36 5.17 SBF Timing Specifications 5.18 General Purpose I/O Timing Specifications 5.19 JTAG and Boundary Scan Timing . . . . . . . . . . . . . . . . 40 5.20 Debug AC Timing Specifications . . . . . . . . . . . . . . . . . 42 6 Power Consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 7 Package Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 8 Product Documentation Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46 ® Microprocessor Data Sheet, Rev. 6 Freescale Semiconductor ...

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... EMAC – Enchance multiply-accumulate unit EPORT – Edge port module FEC – Fast Ethernet controller GPIO – General Purpose Input/Output – Inter-Intergrated Circuit MCF5445x ColdFire Freescale Semiconductor MCF54455 JTAG BDM CAU MMU eDMA Crossbar Switch (XBS) ATA RTC GPIO 2 INTCs 4 DMA ...

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... TEPBGA Freescale Semiconductor • • • • • • • • • • • • 4 • 4 • 2 • • • ...

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... Ordering Information Freescale Part Number MCF54450CVM180 MCF54450 Microprocessor MCF54450VM240 MCF54451CVM180 MCF54451 Microprocessor MCF54451VM240 MCF54452CVR200 MCF54452 Microprocessor MCF54452VR266 MCF54453CVR200 MCF54453 Microprocessor MCF54453VR266 MCF54454CVR200 MCF54454 Microprocessor MCF54454VR266 MCF54455CVR200 MCF54455 Microprocessor MCF54455VR266 3 Hardware Design Considerations 3.1 Analog Power Filtering To further enhance noise isolation, an external filter is strongly recommended for the analog V VDD_RTC) ...

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... Figure 3. Oscillator Power Filter (EV ), SDRAM V (SDV Supplies Stable , SDV DD is non-critical during power-up and power-down sequences. SDV ® Microprocessor Data Sheet, Rev. 6 EVDD Pin ), PLL V (PV ), and internal (3.3V) DD SDV (2.5V — DDR) DD SDV (1.8V — DDR2 Time , more than 0. (2. Freescale Semiconductor ...

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... Table 3. Special-Case Default Signal Functionality Pin FB_AD[31:0] FB_BE/BWE[3:0] FB_CS[3:1] FB_OE FB_R/W FB_TA FB_TS MCF5445x ColdFire Freescale Semiconductor the sense circuits in the I/O pads cause all pad output drivers connected DD and PV power down before States,” for package diagrams. For a more detailed discussion NOTE ...

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... B5, A5 — O EVDD B4, A4 — O EVDD B13 — O EVDD C2, D4, C3 — O EVDD C4 — O EVDD A2 — O EVDD EVDD B1 Freescale Semiconductor MCF54452 MCF54453 MCF54454 MCF54455 Y18 B17 A16 A17 AB17, AB21 L1, L4 L2, L3, M1–4, N1–2 T1–2 W1 Y1 W5, AA4, AB3 Y4 AA1 AA3 AB2 ...

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... PCI_REQ3 PPCI3 PCI_REQ[2:1] PPCI[2:1] PCI_REQ0/ PPCI0 PCI_EXTGNT PCI_RST — PCI_SERR — PCI_STOP — PCI_TRDY — SD_A[13:0] — MCF5445x ColdFire Freescale Semiconductor Alternate 1 Alternate 2 FB_ALE FB_TBST 5 PCI Controller FB_A[31:0] — FB_A[23:0] — — — — — — — ATA_DMACK — — ...

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... I EVDD G3, G4 — I EVDD H1 — I EVDD H2 — I EVDD H3 Freescale Semiconductor MCF54452 MCF54453 MCF54454 MCF54455 360 TEPBGA P22, P19 L19 N22 L22 M22 L20, M20 L21, K22, K21, K20, J20, J19, J21, J22, H20, G22, G21, G20, G19, F22, F21, F20 ...

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... FEC1_TXD[3:2] PFEC1L[7:6] FEC1_TXD1 PFEC1L5 FEC1_TXD0 PFEC1H5 FEC1_TXEN PFEC1H6 FEC1_TXER PFEC1L4 USB_DM — USB_DP — USB_VBUS_EN PUSB1 USB_VBUS_OC PUSB0 MCF5445x ColdFire Freescale Semiconductor Alternate 1 Alternate 2 FEC0_RMII_ — REF_CLK — ULPI_DATA[3:2] FEC0_RMII_TXD1 — FEC0_RMII_TXD0 — FEC0_RMII_TXEN — — ULPI_DATA0 FEC1 — ATA_DIOR — ...

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... I — O EVDD N14 — O EVDD L13 — O EVDD P14 U I/O EVDD R16 — I/O EVDD R15 Freescale Semiconductor Y13 W21, W22 V19–21 W13 AA14 Y14 A13 A12 D20 E19 E20 D21 D22 AA12 Y12 C17 C18 A18 B18 D18 A19 ...

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... PSTDDATA[7:0] — JTAG_EN — PSTCLK — DSI — DSO — BKPT — DSCLK — TEST — PLLTEST — MCF5445x ColdFire Freescale Semiconductor Alternate 1 Alternate 2 SBF_DI — SBF_DO — UARTs — — — — — — — — — — — — ...

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... G6–11, H6–11, G9–10, G12–13, J6–11, K6–11, T1, G15, H7, H16, T16 J9–14, K7, K9–14, K16, L9–14, M7, M9–M14, M16, N9–14, P9–14, T9–11, T13, T15, — — — L15 Freescale Semiconductor W16, W19 T14, T16 B16 C14 C13 P16, R7, T7, AB1, AB22 C16 ...

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... N U0RXD SD_A11 SD_A6 SD_A0 CKE SD_ P SD_A12 SD_A10 SD_A5 SD_BA1 RAS R SD_A13 SD_A9 SD_A4 SD_A1 SD_WE T VSS SD_A8 SD_A3 SD_A2 SD_BA0 Figure 5. MCF54450 and MCF54451 Pinout (256 MAPBGA) MCF5445x ColdFire Freescale Semiconductor FB_AD FB_AD FB_AD FB_AD FB_AD FB_AD FB_AD FB_AD FB_AD FB_AD 3 ...

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... FEC1_ FEC1_ FEC1_ U0RTS NC DMARQ RXD3 RXD1 CRS TXD1 FEC1_ BOOT FEC1_ FEC1_ IRQ3 U0RXD TEST RXDV MOD1 COL TXCLK Freescale Semiconductor 21 22 TDO GND A TMS TRST B JTAG_ TCLK C EN SSI_ SSI_ D RXD TXD SD_ SD_ E DM2 DQS2 F G SD_ SD_ H ...

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... Ensure the external EV than maximum injection current. This is the greatest risk when the MPU is not consuming power (ex; no clock). The power supply must maintain regulation within operating EV conditions. MCF5445x ColdFire Freescale Semiconductor NOTE Table 5. Absolute Maximum Ratings Symbol EV ...

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... J ( × Θ JMA K -------------------------------- - 273°C J × ( × ) × 273° JMA ® Microprocessor Data Sheet, Rev. 6 256 360 Unit MAPBGA TEPBGA ° 1,2 1 1,2 1,2 ° ° ° ° 1,5 1 105 105 and T ( neglected Freescale Semiconductor C Eqn. 1 Eqn. 2 Eqn. 3 ...

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... DD SS Output High Voltage (All input/output and all output pins –5 Output Low Voltage (All input/output and all output pins 5.0mA OL MCF5445x ColdFire Freescale Semiconductor and T can be obtained by solving D J Table 7. ESD Protection Characteristics Symbol HBM Table 8. DC Electrical Specifications 1 OSCV 2 ® ...

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... Table 9. Input Clock Timing Requirements Specification ® Microprocessor Data Sheet, Rev. 6 Min Max I –10 –130 APU C in — 7 — -1.0 1.0 - the injection current may flow out load shunts current greater DD Min Max Unit Freescale Semiconductor Units μ ...

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... Limp PLL Lock Time 3 8 Duty Cycle of reference (External, Limp) 9 XTAL Current 10 Total on-chip stray capacitance on XTAL 11 Total on-chip stray capacitance on EXTAL MCF5445x ColdFire Freescale Semiconductor Specification Figure 7. Input Clock Timing Diagram Table 10. PLL Electrical Characteristics Symbol f ref_crystal f ref_ext f sys t ...

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... See crystal spec L 2 × (C — S_XTAL C - S_EXTAL S_PCB -4.0 4.0 -2.0 2.0 — FB_CLK — TBD % FB_CLK 8. Min Max 9 — 1.5 — 5 — CLKIN cycles — — 20 — CLKIN cycles 0 — — 1 CLKIN cycles Freescale Semiconductor Unit sys % f sys . sys Unit ...

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... The address and data busses are muxed between the FlexBus and PCI controller. At the end of the read and write bus cycles the address signals are indeterminate. MCF5445x ColdFire Freescale Semiconductor Table 12. FlexBus AC Timing Specifications Characteristic NOTE ® ...

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... FB4 FB_TA TSIZ[1:0] Figure 9. FlexBus Read Timing S0 S1 FB_CLK FB1 ADDR[Y:0] FB2 ADDR[31:X] DATA ADDR[31:0] ADDR[31:X] DATA FB_R/W FB_ALE FB_OE FB4 FB_TA TSIZ[1:0] Figure 10. Flexbus Write Timing ® Microprocessor Data Sheet, Rev FB3 FB5 FB4 FB5 S2 S3 FB3 FB5 Freescale Semiconductor ...

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... This input skew must include DDR memory output skew and system level board skew (due to routing or other factors). 8 Data input hold is derived from each DQS clock edge. It begins with a DQS transition and ends when the first data line becomes invalid. MCF5445x ColdFire Freescale Semiconductor Table 13. SDRAM Timing Specifications Symbol t SDCK ...

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... Electrical Characteristics SD_CLK SD_CLK SD_CSn,SD_WE, SD_RAS, SD_CAS DD4 SD_A[13:0] SD_DM3/SD_DM2 SD_DQS3/SD_DQS2 SD_D[31:24]/SD_D[23:16] MCF5445x ColdFire 26 DD1 DD2 DD5 CMD DD6 ROW COL WD1 WD2 WD3 WD4 Figure 11. DDR Write Timing ® Microprocessor Data Sheet, Rev. 6 DD3 DD7 DD8 DD7 DD8 Freescale Semiconductor ...

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... Bused PCI signals — input setup P3 PCI_GNT[3:0]/PCI_REQ[3:0] — input setup P4 All PCI signals — input hold P5 Bused PCI signals — output valid MCF5445x ColdFire Freescale Semiconductor DD1 DD5 CMD DD4 ROW COL Figure 12. DDR Read Timing Table 14. PCI Timing Specifications Characteristic ® ...

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... Good transmission line design practices should be observed to guarantee the specification limits. MCF5445x ColdFire 28 Characteristic Output Valid Input Valid Figure 13. PCI Timing ® Microprocessor Data Sheet, Rev (continued MHz 66 MHz Min Max Min Max — 12.0 — 6.0 2.0 — 1.0 — Freescale Semiconductor Unit ns ns ...

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... U3 Input Hold (control and data) U4 Output Valid (control and data) U5 Output Hold (control and data) MCF5445x ColdFire Freescale Semiconductor Not to exceed 17% of PCI Cycle Table 15. These timings apply to synchronous mode only. All timings are measured NOTE Table 15. ULPI Interface Timing Min — ...

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... Figure 15. ULPI Timing Diagram Table 16. SSI Timing — Master Modes Symbol t MCLK t BCLK ® Microprocessor Data Sheet, Rev Min Max Units Notes 2 × t — ns SYS 45% 55% t MCLK 8 × t — ns SYS 45% 55% t BCLK — — ns — — — — sys ). sys Freescale Semiconductor 2 3 ...

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... SSI_RXD hold after SSI_BCLK 1 All timings specified with a capactive load of 25pF. SSI_MCLK (Output) SSI_BCLK (Output) S5 SSI_FS (Output) SSI_FS (Input) S7 SSI_TXD SSI_RXD MCF5445x ColdFire Freescale Semiconductor Table 17. SSI Timing — Slave Modes Symbol t BCLK S10 Figure 16. SSI Timing — Master Modes ® ...

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... Microprocessor Data Sheet, Rev. 6 S16 S14 S16 18. Min Max Units 2 — t SYS 8 — t SYS — — ns — — t SYS 0 — — t SYS 2 — t SYS Figure 18. Min Max Units 6 — t SYS 10 — t SYS — — µs 7 — t SYS — Freescale Semiconductor ...

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... RXCLK frequency E1 RXD[n:0], RXDV, RXER to RXCLK setup E2 RXCLK to RXD[n:0], RXDV, RXER hold E3 RXCLK pulse width high E4 RXCLK pulse width low 1 In MII mode RMII mode MCF5445x ColdFire Freescale Semiconductor Characteristic Figure 18 Input/Output Timings Table 20. Receive Signal Timing MII Mode Min Max — ...

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... E8 E6 Valid Data Table 22. MII Transmit Signal Timing Characteristic ® Microprocessor Data Sheet, Rev RMII Mode Unit Min Max — 50 MHz 5 — ns — 35% 65% t TXCLK 35% 65% t TXCLK E7 E5 Min Max Unit 1.5 — TXCLK period Freescale Semiconductor ...

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... Timer Module Timing Specifications Table 24 lists timer module AC timings. Table 24. Timer Module AC Timing Specifications Name T1 DTnIN cycle time (n = 0:3) T2 DTnIN pulse width (n = 0:3) MCF5445x ColdFire Freescale Semiconductor E9 Figure 21. MII Async Inputs Timing Diagram Symbol E10 E11 E11 E12 Valid Data E14 ...

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... SUI t 3.0 — 4.0 — — 7 — 1.5 ns SKEW1 t 2.0 — ns I_DS t 3.5 — ns I_DH 1 Min Max Unit — ns SYS ÷ 2.0 ÷ 2 sck ) - 1.5 — ns SYS ) - 3.0 — ns SYS — — — — ns — Freescale Semiconductor Table 25 Notes Notes ...

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... The DSPI_PCSn to DSPI_SCK delay is programmable in DCTARn[PCSSCK] and DCTARn[CSSCK]. 5 The DSPI_SCK to DSPI_PCSn delay is programmable in DCTARn[PASC] and DCTARn[ASC]. DSPI_PCSn DSPI_SCK (DCTARn[CPOL DSPI_SCK (DCTARn[CPOL DSPI_SIN DSPI_SOUT Figure 23. DSPI Classic SPI Timing — Master Mode MCF5445x ColdFire Freescale Semiconductor Symbol Min — 0 — 2 — 7 — — — ...

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... The first byte of data read from the serial memory contains a divider value REF ® Microprocessor Data Sheet, Rev. 6 DS1 DS9 DS14 Last Data Last Data Min Max Unit 40 — ns — t SBFCK - 2.0 — 2.0 — — — — — ns Freescale Semiconductor Notes 1 ...

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... FB_CLK High to GPIO Input Invalid 1 These general purpose specifications apply to the following signals: IRQn, all UART signals, all timer signals, DACKn and DREQn, and all signals configured as GPIO. FB_CLK GPIO Outputs GPIO Inputs MCF5445x ColdFire Freescale Semiconductor SB3 SB1 SB2 SB2 SB7 SB8 Last Data ...

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... V IH TCLK (input) J4 MCF5445x ColdFire 40 Table 29. JTAG and Boundary Scan Timing 1 Characteristics Figure 27. Test Clock Input Timing ® Microprocessor Data Sheet, Rev. 6 Min Max Unit DC 20 MHz 50 — — — — ns — — — — ns — — — — Freescale Semiconductor ...

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... Data Inputs Data Outputs Data Outputs Data Outputs TCLK V IL TDI TMS TDO TDO TDO TCLK TRST MCF5445x ColdFire Freescale Semiconductor J5 Input Data Valid Figure 28. Boundary Scan (JTAG) Timing J9 Input Data Valid J11 J12 J11 Figure 29. Test Access Port Timing J14 J13 Figure 30. TRST Timing ® ...

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... Table 30. Debug AC Timing Specification Characteristic Min 1 — 1 Figure 31. Real-Time Trace AC Timing D5 Current D4 Past Figure 32. BDM Serial Port AC Timing ® Microprocessor Data Sheet, Rev. 6 and Table 32. Max Units 1 t SYS 3.0 ns — ns — PSTCLK — PSTCLK — PSTCLK — PSTCLK D2 Next Current Freescale Semiconductor ...

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... SDV DD Total Power 1 All voltage rails at nominal values: IV 850 800 750 700 650 600 550 500 Idle Figure 33. Power Consumption in Various Applications MCF5445x ColdFire Freescale Semiconductor MP3 TFTP Idle Playback Download 215.6 288.8 274.4 27.6 33.6 32.6 142.9 158.2 161.1 672 ...

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... Freescale Semiconductor ...

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... MCF54454 MCF54455 8 Product Documentation Documentation is available from a local Freescale distributor, a Freescale sales office, the Freescale Literature Distribution Center, or through the Freescale world-wide web address at http://www.freescale.com/coldfire. MCF5445x ColdFire Freescale Semiconductor 200 233 266 System Frequency (MHz) Power Consumption in Low-Power Modes DD Table 33. Package Information ...

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... MCF54450VM180 to MCF54450CVM180 and changed it’s temperature entry ° ° ° to +70 C” to “–40 to +85 C” changed Input Leakage Current (I ) from ±1.0 to ±2.5μA in ® Microprocessor Data Sheet, Rev. 6 specification from “-0.3 to +4.0” to “-0 specification from ±1 to ±10μA, and OZ Table 6. Freescale Semiconductor ...

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... MCF5445x ColdFire Freescale Semiconductor ® Microprocessor Data Sheet, Rev. 6 Revision History 47 ...

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... Freescale Semiconductor product could create a situation where personal injury or death may occur. Should Buyer ...