ISL88707IB846Z-TK

Manufacturer Part NumberISL88707IB846Z-TK
DescriptionIC SUPERVISOR MPU 4.64V 8-SOIC
ManufacturerIntersil
TypeSimple Reset/Power-On Reset
ISL88707IB846Z-TK datasheet
 

Specifications of ISL88707IB846Z-TK

Number Of Voltages Monitored1OutputOpen Drain, Push-Pull
ResetActive High/Active LowReset Timeout140 ms Minimum
Voltage - Threshold4.64VOperating Temperature-40°C ~ 85°C
Mounting TypeSurface MountPackage / Case8-SOIC (3.9mm Width)
Lead Free Status / RoHS StatusLead free / RoHS CompliantOther namesISL88707IB846Z-TKTR
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ISL88705, ISL88706, ISL88707, ISL88708, ISL88716, ISL88813
Typical Performance Curves
ISL88705EVAL1 and Applications
The ISL88705EVAL1 supports all six of the ISL88705,
ISL88706, ISL88707, ISL88708, ISL88716, ISL88813
devices, enabling evaluation of basic functional operation
and common application implementations. Figures 15 and
17 illustrate the ISL88705EVAL1 in photographic and
schematic forms respectively.
The ISL88705EVAL1 is divided into two banks; each bank
having one each of the three available pinouts. The top bank
is fully populated and immediately usable whereas the
bottom bank is unpopulated. Samples of other sample
variants can be evaluated singularly or in combination with
any other variant to provide a specific voltage monitoring
solution. The left position has the ISL88705IB846Z
monitoring the V
rail voltage for a minimum of 4.64V with
DD
reset signaling. In addition, the power fail input (PFI) is being
compared to the internal PFI voltage reference of 1.25V and
the power fail output (PFO) will report the PFI condition. This
feature can be used for monitoring an auxiliary voltage,
providing an early warning of a brown-out or power failure or
presence detection in a system.
The middle position has the ISL88813IB846Z installed and is
set-up as a 5V window detector with jumper J1 installed. The
V
monitors for UV and the PFI for OV via the R
DD
divider. The PFO output is inverted and connected to the
manual reset input (MR) via U4. Hence, a reset signal is
generated when 4.64V < V
> 5.38V. With J1 removed, the
DD
PFO will be an OV indicator but no reset signal will be
generated. Both of these positions share a common
Watchdog input (WDI) signal although each has its own
Watchdog output (WDO).
11
(Continued)
V
DD
5.5V OV
FIGURE 14. 5V OV/UV MONITORING
The right position has the ISL88707IB846Z and is set-up as
a +12V and +5V UV monitor with reset signal. The PFI
allows monitoring of any voltage above the 1.25V PFI
reference and with a resistor divider this is used to monitor
the 12V. The ISL88707 and ISL88708 have the unique
feature of an adjustable time to reset (t
generation capability via the C
capacitor to GND. This evaluation platform has an adjustable
SMD capacitor, C
of this feature. Also unique to the ISL88707 and ISL88708
are both the RESET and RESET outputs, all other variants
having only one or the other.
Figures 10, 11, 12, 13 and 14 illustrate the basic IC functions
and performance of the 3 implementations.
, R
3
4
RESET
) signal
POR
pin with an external
POR
(8pF to 45pF) that allows easy evaluation
4
FIGURE 15. ISL88705EVAL1
January 12, 2009
FN8092.5