DSP56311VL150 Freescale Semiconductor, DSP56311VL150 Datasheet - Page 7

• Manufacturer Part Number: DSP56311VL150
• Description: IC DSP 24BIT FIXED POINT 196-BGA
• Manufacturer: Freescale Semiconductor
• Series: DSP563xxr
• Type: Fixed Pointr

Specifications of DSP56311VL150

• Interface: Host Interface, SSI, SCI
• Clock Rate: 150MHz
• Non-volatile Memory: ROM (576 B)
• On-chip Ram: 384kB
• Voltage - I/o: 3.30V
• Voltage - Core: 1.80V
• Operating Temperature: -40°C ~ 100°C
• Mounting Type: Surface Mount
• Package / Case: 196-MAPBGA
• Package: 196MA-BGA
• Numeric And Arithmetic Format: Fixed-Point
• Maximum Speed: 150 MHz
• Ram Size: 384 KB
• Device Million Instructions Per Second: 150 MIPS
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

1.1 Power
1.2 Ground
1.3 Clock
Freescale Semiconductor
V
V
V
V
V
V
V
V
Note: The user must provide adequate external decoupling capacitors for all power connections.
GND
GND
GND
Note: The user must provide adequate external decoupling capacitors for all GND connections.
EXTAL
XTAL
Power Name
Signal Name
CCP
CCQL
CCQH
CCA
CCD
CCC
CCH
CCS
Name
P
P1
PLL Power—V
an extremely low impedance path to the V
Quiet Core (Low) Power—An isolated power for the core processing logic. This input must be isolated externally from
all other chip power inputs.
Quiet External (High) Power—A quiet power source for I/O lines. This input must be tied externally to all other chip
power inputs , except V
Address Bus Power—An isolated power for sections of the address bus I/O drivers. This input must be tied externally
to all other chip power inputs, except V
Data Bus Power—An isolated power for sections of the data bus I/O drivers. This input must be tied externally to all
other chip power inputs, except V
Bus Control Power—An isolated power for the bus control I/O drivers. This input must be tied externally to all other
chip power inputs, except V
Host Power—An isolated power for the HI08 I/O drivers. This input must be tied externally to all other chip power
inputs, except V
ESSI, SCI, and Timer Power—An isolated power for the ESSI, SCI, and timer I/O drivers. This input must be tied
externally to all other chip power inputs, except V
PLL Ground—Ground-dedicated for PLL use. The connection should be provided with an extremely low-impedance
path to ground. V
package.
PLL Ground 1—Ground-dedicated for PLL use. The connection should be provided with an extremely low-impedance
path to ground.
Ground—Connected to an internal device ground plane.
Input
Output
Type
CC
CCQL
CCP
dedicated for PLL use. The voltage should be well-regulated and the input should be provided with
Input
Chip-driven
.
State During
should be bypassed to GND
CCQL
Reset
CCQL
.
DSP56311 Technical Data, Rev. 8
Table 1-4.
Table 1-2.
.
CCQL
Table 1-3.
.
CCQL
External Clock/Crystal Input—Interfaces the internal crystal oscillator input
to an external crystal or an external clock.
Crystal Output—Connects the internal crystal oscillator output to an external
crystal. If an external clock is used, leave XTAL unconnected.
CC
.
power rail.
Clock Signals
CCQL
Power Inputs
P
by a 0.47 µF capacitor located as close as possible to the chip
Grounds
Description
Description
.
Signal Description
Power
1-3