ATMEGA2560R231-CU Atmel, ATMEGA2560R231-CU Datasheet - Page 28

• Manufacturer Part Number: ATMEGA2560R231-CU
• Description: BUNDLE ATMEGA2560/RF231 PBGA
• Manufacturer: Atmel

Specifications of ATMEGA2560R231-CU

• Frequency: 2.4GHz
• Modulation Or Protocol: 802.15.4 Zigbee, 6LoWPAN, RF4CE, SP100, WirelessHART™, ISM
• Data Interface: PCB, Surface Mount
• Memory Size: 256kB Flash, 4kB EEPROM, 8kB RAM
• Antenna Connector: PCB, Surface Mount
• Package / Case: 100-CBGA and 32-QFN
• Processor Series: ATMEGA256x
• Core: AVR8
• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Program Memory Size: 256 KB
• Data Ram Size: 8 KB
• Development Tools By Supplier: ATAVRRZ541, ATAVRRAVEN, ATAVRRZRAVEN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Voltage - Supply: -
• Power - Output: -
• Operating Temperature: -
• Applications: -
• Sensitivity: -
• Data Rate - Maximum: -
• Current - Transmitting: -
• Current - Receiving: -
• Lead Free Status / Rohs Status: Details

8. External Memory Interface
8.1
2549M–AVR–09/10
Overview
With all the features the External Memory Interface provides, it is well suited to operate as an
interface to memory devices such as External SRAM and Flash, and peripherals such as LCD-
display, A/D, and D/A. The main features are:
•
•
•
•
When the eXternal MEMory (XMEM) is enabled, address space outside the internal SRAM
becomes available using the dedicated External Memory pins (see
12-3 on page
tion is shown in
Figure 8-1.
Four different wait-state settings (including no wait-state)
Independent wait-state setting for different External Memory sectors (configurable sector size)
The number of bits dedicated to address high byte is selectable
Bus keepers on data lines to minimize current consumption (optional)
78,
External Memory with Sector Select
Figure
Table 12-9 on page
8-1.
External Memory
(0 - 60K x 8)
ATmega640/1280/1281/2560/2561
82, and
Memory Configuration A
Internal memory
Lower sector
Upper sector
Table 12-21 on page
SRW01
SRW00
SRW11
SRW10
0x0000
0x21FF
0x2200
0xFFFF
SRL[2..0]
Figure 1-3 on page
90). The memory configura-
4,
Table
28