ATMEGA2560R231-CU Atmel, ATMEGA2560R231-CU Datasheet - Page 63

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ATMEGA2560R231-CU

Manufacturer Part Number
ATMEGA2560R231-CU
Description
BUNDLE ATMEGA2560/RF231 PBGA
Manufacturer
Atmel
Datasheet

Specifications of ATMEGA2560R231-CU

Frequency
2.4GHz
Modulation Or Protocol
802.15.4 Zigbee, 6LoWPAN, RF4CE, SP100, WirelessHART™, ISM
Data Interface
PCB, Surface Mount
Memory Size
256kB Flash, 4kB EEPROM, 8kB RAM
Antenna Connector
PCB, Surface Mount
Package / Case
100-CBGA and 32-QFN
Processor Series
ATMEGA256x
Core
AVR8
Data Bus Width
8 bit
Program Memory Type
Flash
Program Memory Size
256 KB
Data Ram Size
8 KB
Development Tools By Supplier
ATAVRRZ541, ATAVRRAVEN, ATAVRRZRAVEN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Voltage - Supply
-
Power - Output
-
Operating Temperature
-
Applications
-
Sensitivity
-
Data Rate - Maximum
-
Current - Transmitting
-
Current - Receiving
-
Lead Free Status / Rohs Status
 Details
11.4
11.4.1
11.4.2
2549M–AVR–09/10
Watchdog Timer
Features
Overview
ADC is used. To reduce power consumption in Power-down mode, the user can avoid the three
conditions above to ensure that the reference is turned off before entering Power-down mode.
Figure 11-7. Watchdog Timer
ATmega640/1280/1281/2560/2561 has an Enhanced Watchdog Timer (WDT). The WDT is a
timer counting cycles of a separate on-chip 128 kHz oscillator. The WDT gives an interrupt or a
system reset when the counter reaches a given time-out value. In normal operation mode, it is
required that the system uses the WDR - Watchdog Timer Reset - instruction to restart the coun-
ter before the time-out value is reached. If the system doesn't restart the counter, an interrupt or
system reset will be issued.
In Interrupt mode, the WDT gives an interrupt when the timer expires. This interrupt can be used
to wake the device from sleep-modes, and also as a general system timer. One example is to
limit the maximum time allowed for certain operations, giving an interrupt when the operation
has run longer than expected. In System Reset mode, the WDT gives a reset when the timer
expires. This is typically used to prevent system hang-up in case of runaway code. The third
mode, Interrupt and System Reset mode, combines the other two modes by first giving an inter-
rupt and then switch to System Reset mode. This mode will for instance allow a safe shutdown
by saving critical parameters before a system reset.
The Watchdog always on (WDTON) fuse, if programmed, will force the Watchdog Timer to Sys-
tem Reset mode. With the fuse programmed the System Reset mode bit (WDE) and Interrupt
mode bit (WDIE) are locked to 1 and 0 respectively. To further ensure program security, altera-
Clocked from separate On-chip Oscillator.
3 Operating modes.
Selectable Time-out period from 16 ms to 8 s.
Possible Hardware fuse Watchdog always on (WDTON) for fail-safe mode.
– Interrupt.
– System Reset.
– Interrupt and System Reset.
WATCHDOG
RESET
OSCILLATOR
128 kHz
WDIF
WDIE
WDE
ATmega640/1280/1281/2560/2561
WDP0
WDP1
WDP2
WDP3
MCU RESET
INTERRUPT
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