ATMEGA2560R231-CU Atmel, ATMEGA2560R231-CU Datasheet - Page 80

• Manufacturer Part Number: ATMEGA2560R231-CU
• Description: BUNDLE ATMEGA2560/RF231 PBGA
• Manufacturer: Atmel

Specifications of ATMEGA2560R231-CU

• Frequency: 2.4GHz
• Modulation Or Protocol: 802.15.4 Zigbee, 6LoWPAN, RF4CE, SP100, WirelessHART™, ISM
• Data Interface: PCB, Surface Mount
• Memory Size: 256kB Flash, 4kB EEPROM, 8kB RAM
• Antenna Connector: PCB, Surface Mount
• Package / Case: 100-CBGA and 32-QFN
• Processor Series: ATMEGA256x
• Core: AVR8
• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Program Memory Size: 256 KB
• Data Ram Size: 8 KB
• Development Tools By Supplier: ATAVRRZ541, ATAVRRAVEN, ATAVRRZRAVEN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Voltage - Supply: -
• Power - Output: -
• Operating Temperature: -
• Applications: -
• Sensitivity: -
• Data Rate - Maximum: -
• Current - Transmitting: -
• Current - Receiving: -
• Lead Free Status / Rohs Status: Details

ATmega640/1280/1281/2560/2561
PCINT7, Pin Change Interrupt source 7: The PB7 pin can serve as an external interrupt source.
• OC1B/PCINT6, Bit 6
OC1B, Output Compare Match B output: The PB6 pin can serve as an external output for the
Timer/Counter1 Output Compare B. The pin has to be configured as an output (DDB6 set (one))
to serve this function. The OC1B pin is also the output pin for the PWM mode timer function.
PCINT6, Pin Change Interrupt source 6: The PB6 pin can serve as an external interrupt source.
• OC1A/PCINT5, Bit 5
OC1A, Output Compare Match A output: The PB5 pin can serve as an external output for the
Timer/Counter1 Output Compare A. The pin has to be configured as an output (DDB5 set (one))
to serve this function. The OC1A pin is also the output pin for the PWM mode timer function.
PCINT5, Pin Change Interrupt source 5: The PB5 pin can serve as an external interrupt source.
• OC2A/PCINT4, Bit 4
OC2A, Output Compare Match output: The PB4 pin can serve as an external output for the
Timer/Counter2 Output Compare. The pin has to be configured as an output (DDB4 set (one)) to
serve this function. The OC2A pin is also the output pin for the PWM mode timer function.
PCINT4, Pin Change Interrupt source 4: The PB4 pin can serve as an external interrupt source.
• MISO/PCINT3 – Port B, Bit 3
MISO: Master Data input, Slave Data output pin for SPI channel. When the SPI is enabled as a
master, this pin is configured as an input regardless of the setting of DDB3. When the SPI is
enabled as a slave, the data direction of this pin is controlled by DDB3. When the pin is forced to
be an input, the pull-up can still be controlled by the PORTB3 bit.
PCINT3, Pin Change Interrupt source 3: The PB3 pin can serve as an external interrupt source.
• MOSI/PCINT2 – Port B, Bit 2
MOSI: SPI Master Data output, Slave Data input for SPI channel. When the SPI is enabled as a
slave, this pin is configured as an input regardless of the setting of DDB2. When the SPI is
enabled as a master, the data direction of this pin is controlled by DDB2. When the pin is forced
to be an input, the pull-up can still be controlled by the PORTB2 bit.
PCINT2, Pin Change Interrupt source 2: The PB2 pin can serve as an external interrupt source.
• SCK/PCINT1 – Port B, Bit 1
SCK: Master Clock output, Slave Clock input pin for SPI channel. When the SPI is enabled as a
slave, this pin is configured as an input regardless of the setting of DDB1. When the SPI0 is
enabled as a master, the data direction of this pin is controlled by DDB1. When the pin is forced
to be an input, the pull-up can still be controlled by the PORTB1 bit.
PCINT1, Pin Change Interrupt source 1: The PB1 pin can serve as an external interrupt source.
• SS/PCINT0 – Port B, Bit 0
SS: Slave Port Select input. When the SPI is enabled as a slave, this pin is configured as an
input regardless of the setting of DDB0. As a slave, the SPI is activated when this pin is driven
low. When the SPI is enabled as a master, the data direction of this pin is controlled by DDB0.
When the pin is forced to be an input, the pull-up can still be controlled by the PORTB0 bit.
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