AT32UC3C164C-AUR Atmel, AT32UC3C164C-AUR Datasheet - Page 70

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AT32UC3C164C-AUR

Manufacturer Part Number
AT32UC3C164C-AUR
Description
IC MCU AVR32 64K FLASH 100TQFP
Manufacturer
Atmel
Series
AVR®32 UC3r
Datasheet

Specifications of AT32UC3C164C-AUR

Core Processor
AVR
Core Size
32-Bit
Speed
66MHz
Connectivity
CAN, Ethernet, I²C, IrDA, LIN, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
81
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 16x12b, D/A 4x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TFQFP
Processor Series
AT32UC3x
Core
AVR32
Data Bus Width
32 bit
3rd Party Development Tools
EWAVR32, EWAVR32-BL
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT32UC3C164C-AUR
Manufacturer:
ATMEL
Quantity:
1 240
Part Number:
AT32UC3C164C-AUR
Manufacturer:
Atmel
Quantity:
10 000
7.9
7.9.1
Table 7-42.
32117BS–AVR-03/11
Parameter
Startup time from power-up, using
regulator
Startup time from reset release
Wake-up
Timing Characteristics
Startup, Reset, and Wake-up Timing
Maximum Reset and Wake-up Timing
Idle
Frozen
Standby
Stop
Deepstop
Static
The startup, reset, and wake-up timings are calculated using the following formula:
Where
clock the startup time of the oscillator,
stop, deepstop, and static sleep modes. Please refer to the source for the CPU clock in the
”Oscillator Characteristics” on page 57
t
t
CPU
=
t
CONST
is the period of the CPU clock. If another clock source than RCSYS is selected as CPU
t
CONST
VDDIN_5 rising (10 mV/ms)
Time from V
the decode stage of CPU. VDDCORE is supplied by
the internal regulator.
Time from releasing a reset source (except POR,
BOD18, and BOD33) to the first instruction entering
the decode stage of CPU.
From wake-up event to the first instruction entering
the decode stage of the CPU.
Measuring
+
N
and
CPU
×
N
CPU
VDDIN_5
t
CPU
are found in
=0 to the first instruction entering
for more details about oscillator startup times.
t
OSCSTART
Table
7-42.
, must be added to the wake-up time in the
t
CONST
Max
268+
268+
268+
is the delay relative to RCSYS,
t
CONST
t
t
t
2600
1240
OSCSTART
OSCSTART
OSCSTART
268
268
0
(in µs)
AT32UC3C
Max
209
209
212
212
212
N
19
0
0
CPU
70

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