S9S12XS128J1MAL Freescale Semiconductor, S9S12XS128J1MAL Datasheet - Page 75

• Manufacturer Part Number: S9S12XS128J1MAL
• Description: IC MCU 16BIT 128KB FLSH 112LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of S9S12XS128J1MAL

• Core Processor: HCS12X
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: CAN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 91
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 8K x 8
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1.72 V ~ 5.5 V
• Data Converters: A/D 16x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 112-LQFP
• Processor Series: S12XS
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 8 KB
• Interface Type: CAN, SCI, SPI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 91
• Number Of Timers: 12
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: DEMO9S12XSFAME, EVB9S12XEP100
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 16 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

1
1
2.3.3
2.3.4
Freescale Semiconductor
Address 0x0000 (PRR)
Address 0x0001 (PRR)
Read: Anytime. The data source depends on the data direction value.
Write: Anytime.
Read: Anytime. The data source depends on the data direction value.
Write: Anytime.
Field
Field
Reset
Reset
7-0
7-0
PB
PA
W
W
R
R
Port A general purpose input/output data—Data Register
The associated pin can be used as general purpose I/O. In general purpose output mode the register bit value is
driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port register bit, otherwise the buffered
pin input state is read.
Port B general purpose input/output data—Data Register
The associated pin can be used as general purpose I/O. In general purpose output mode the register bit value is
driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port register bit, otherwise the buffered
pin input state is read.
Port A Data Register (PORTA)
Port B Data Register (PORTB)
PB7
PA7
0
0
7
7
PB6
PA6
0
0
6
6
Table 2-5. PORTB Register Field Descriptions
Table 2-4. PORTA Register Field Descriptions
Figure 2-1. Port A Data Register (PORTA)
Figure 2-2. Port B Data Register (PORTB)
S12XS Family Reference Manual, Rev. 1.11
PB5
PA5
0
0
5
5
PB4
PA4
0
0
4
4
Description
Description
PB3
PA3
3
0
3
0
PB2
PA2
0
0
Port Integration Module (S12XSPIMV1)
2
2
Access: User read/write
Access: User read/write
PA1
PB1
0
0
1
1
PA0
PB0
0
0
0
0
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1
1