A2F500M3G-FGG256 Actel, A2F500M3G-FGG256 Datasheet - Page 63

• Manufacturer Part Number: A2F500M3G-FGG256
• Description: FPGA - Field Programmable Gate Array 500K System Gates
• Manufacturer: Actel

Specifications of A2F500M3G-FGG256

• Processor Series: A2F500
• Core: ARM Cortex M3
• Number Of Logic Blocks: 24
• Maximum Operating Frequency: 100 MHz
• Number Of Programmable I/os: 117
• Data Ram Size: 64 KB
• Delay Time: 50 ns
• Supply Voltage (max): 3.6 V
• Supply Current: 2 mA
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: 0 C
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: A2F-Eval-Kit, A2F-Dev-Kit, FlashPro 3, FlashPro Lite, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA
• Mounting Style: SMD/SMT
• Supply Voltage (min): 1.5 V
• Number Of Gates: 500000
• Package / Case: FPBGA-256
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

DDR Module Specifications
Input DDR Module
Figure 2-19 • Input DDR Timing Model
Table 2-73 • Parameter Definitions
Parameter Name
t
t
t
t
t
t
t
t
CLK
Data
DDRICLKQ1
DDRICLKQ2
DDRISUD
DDRIHD
DDRICLR2Q1
DDRICLR2Q2
DDRIREMCLR
DDRIRECCLR
CLR
INBUF
CLKBUF
INBUF
Clock-to-Out Out_QR
Clock-to-Out Out_QF
Data Setup Time of DDR input
Data Hold Time of DDR input
Clear-to-Out Out_QR
Clear-to-Out Out_QF
Clear Removal
Clear Recovery
A
B
C
Parameter Definition
R e v i s i o n 6
Input DDR
DDR_IN
SmartFusion Intelligent Mixed Signal FPGAs
FF1
FF2
Measuring Nodes (from, to)
D
E
B, D
C, D
B, E
A, B
A, B
C, E
C, B
C, B
Out_QF
(to core)
Out_QR
(to core)
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