A3P400-FGG484 Actel, A3P400-FGG484 Datasheet - Page 121

• Manufacturer Part Number: A3P400-FGG484
• Description: FPGA - Field Programmable Gate Array 400K System Gates
• Manufacturer: Actel

Specifications of A3P400-FGG484

• Processor Series: A3P400
• Core: IP Core
• Maximum Operating Frequency: 350 MHz
• Number Of Programmable I/os: 194
• Data Ram Size: 55296
• Delay Time: 11.1 ns
• Supply Voltage (max): 1.575 V
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Development Tools By Supplier: A3PE-Proto-Kit, A3PE-Brd1500-Skt, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA, FlashPro 4, FlashPro 3, FlashPro Lite
• Mounting Style: SMD/SMT
• Supply Voltage (min): 1.425 V
• Number Of Gates: 400 K
• Package / Case: FPBGA-484
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 2-120 • A3P250 FIFO 512×8
Parameter
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
F
ENS
ENH
BKS
BKH
DS
DH
CKQ1
CKQ2
RCKEF
WCKFF
CKAF
RSTFG
RSTAF
RSTBQ
REMRSTB
RECRSTB
MPWRSTB
CYC
MAX
Worst Commercial-Case Conditions: T
REN_B, WEN_B Setup Time
REN_B, WEN_B Hold Time
BLK_B Setup Time
BLK_B Hold Time
Input Data (DI) Setup Time
Input Data (DI) Hold Time
Clock High to New Data Valid on DO (flow-through)
Clock High to New Data Valid on DO (pipelined)
RCLK High to Empty Flag Valid
WCLK High to Full Flag Valid
Clock High to Almost Empty/Full Flag Valid
RESET_B Low to Empty/Full Flag Valid
RESET_B Low to Almost Empty/Full Flag Valid
RESET_B Low to Data Out Low on DO (flow-through)
RESET_B Low to Data Out Low on DO (pipelined)
RESET_B Removal
RESET_B Recovery
RESET_B Minimum Pulse Width
Clock Cycle Time
Maximum Frequency for FIFO
Description
J
= 70°C, VCC = 1.425 V
R e v i s i o n 9
3.75
0.00
0.18
0.00
2.17
0.94
1.72
1.63
1.69
6.13
0.19
0.00
6.19
0.92
0.92
0.29
1.50
0.21
3.23
310
–2
ProASIC3 Flash Family FPGAs
4.27
0.00
0.22
0.00
0.21
0.00
2.47
1.07
1.96
1.86
7.05
1.93
6.98
1.05
1.05
0.33
1.71
0.24
3.68
272
–1
Std.
5.02
0.00
0.26
0.00
0.25
0.00
2.90
1.26
2.30
2.18
8.29
2.27
8.20
1.23
1.23
0.38
2.01
0.29
4.32
231
Units
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
2- 107