A3P400-FGG484 Actel, A3P400-FGG484 Datasheet - Page 80

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A3P400-FGG484

Manufacturer Part Number
A3P400-FGG484
Description
FPGA - Field Programmable Gate Array 400K System Gates
Manufacturer
Actel
Datasheet

Specifications of A3P400-FGG484

Processor Series
A3P400
Core
IP Core
Maximum Operating Frequency
350 MHz
Number Of Programmable I/os
194
Data Ram Size
55296
Delay Time
11.1 ns
Supply Voltage (max)
1.575 V
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Development Tools By Supplier
A3PE-Proto-Kit, A3PE-Brd1500-Skt, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA, FlashPro 4, FlashPro 3, FlashPro Lite
Mounting Style
SMD/SMT
Supply Voltage (min)
1.425 V
Number Of Gates
400 K
Package / Case
FPBGA-484
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
A3P400-FGG484I
Manufacturer:
Microsemi SoC
Quantity:
10 000
ProASIC3 DC and Switching Characteristics
Table 2-86 • Minimum and Maximum DC Input and Output Levels
Figure 2-10 • AC Loading
Table 2-87 • AC Waveforms, Measuring Points, and Capacitive Loads
Table 2-88 • 3.3 V PCI/PCI-X
Table 2-89 • 3.3 V PCI/PCI-X
2- 66
3.3 V PCI/PCI-X
Drive Strength
Per PCI specification
Notes:
1. Currents are measured at high temperature (100°C junction temperature) and maximum voltage.
2. Currents are measured at 85°C junction temperature.
Input Low (V)
0
*
Speed Grade
Std.
–1
–2
Note:
Speed Grade
Std.
–1
–2
Note:
Measuring point = V
Test Point
For specific junction temperature and voltage supply levels, refer to
For specific junction temperature and voltage supply levels, refer to
Datapath
Commercial-Case Conditions: T
Applicable to Advanced I/O Banks
Commercial-Case Conditions: T
Applicable to Standard Plus I/O Banks
3.3 V PCI, 3.3 V PCI-X
Peripheral Component Interface for 3.3 V standard specifies support for 33 MHz and 66 MHz PCI Bus
applications.
AC loadings are defined per the PCI/PCI-X specifications for the datapath; Actel loadings for enable path
characterization are described in
AC loadings are defined per PCI/PCI-X specifications for the datapath; Actel loading for tristate is
described in
Timing Characteristics
R = 25
t
t
DOUT
0.66
0.56
0.49
DOUT
0.66
0.56
0.49
trip.
Min.
See
Table
V
2.68
2.28
2.00
2.31
1.96
1.72
t
t
R to VCCI for t
R to GND for t
DP
DP
VIL
Table 2-22 on page 2-22
2-87.
Max.
V
0.04
0.04
0.03
0.04
0.04
0.03
t
t
Input High (V)
DIN
DIN
Min.
3.3
V
0.86
0.73
0.65
0.85
0.72
0.64
DP
DP
t
t
PY
PY
Figure
J
J
VIH
(R)
(F)
= 70°C, Worst-Case VCC = 1.425 V, Worst-Case VCCI = 3.0 V
= 70°C, Worst-Case VCC = 1.425 V, Worst-Case VCCI = 3.0 V
Max.
t
t
V
EOUT
0.43
0.36
0.32
EOUT
0.43
0.36
0.32
2-10.
Enable Path
Test Point
for a complete table of trip points.
Per PCI curves
R e visio n 9
Max,.
VOL
2.73
2.32
2.04
2.35
2.00
1.76
V
t
t
0.285 * VCCI for t
0.615 * VCCI for t
ZL
ZL
Measuring Point* (V)
R = 1 k
VOH
Min.
1.95
1.66
1.46
1.70
1.45
1.27
V
t
t
ZH
ZH
Table 2-6 on page 2-6
Table 2-6 on page 2-6
mA mA
I
OL
10 pF for t
R to VCCI for t
R to GND for t
5 pF for t
3.21
2.73
2.40
2.79
2.37
2.08
t
t
LZ
LZ
I
DP(R)
DP(F)
OH
3.58
3.05
2.68
3.22
2.74
2.41
t
t
Max.
HZ
mA
HZ
HZ
I
ZH
OSL
/ t
/ t
1
HZ
LZ
LZ
ZHS
4.97
4.22
3.71
4.59
3.90
3.42
t
t
ZLS
ZLS
/ t
/ t
for derating values.
for derating values.
C
ZH
/ t
ZL
LOAD
Max.
I
mA
ZL
OSH
/ t
/ t
10
4.19
3.94
ZLS
/ t
t
3.56
3.13
t
3.35
2.94
1
ZHS
ZHS
ZHS
(pF)
ZLS
µA
10
I
IL
Units
Units
2
ns
ns
ns
ns
ns
ns
µA
I
10
IH
2

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