A3P400-FGG484 Actel, A3P400-FGG484 Datasheet - Page 16

• Manufacturer Part Number: A3P400-FGG484
• Description: FPGA - Field Programmable Gate Array 400K System Gates
• Manufacturer: Actel

Specifications of A3P400-FGG484

• Processor Series: A3P400
• Core: IP Core
• Maximum Operating Frequency: 350 MHz
• Number Of Programmable I/os: 194
• Data Ram Size: 55296
• Delay Time: 11.1 ns
• Supply Voltage (max): 1.575 V
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Development Tools By Supplier: A3PE-Proto-Kit, A3PE-Brd1500-Skt, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA, FlashPro 4, FlashPro 3, FlashPro Lite
• Mounting Style: SMD/SMT
• Supply Voltage (min): 1.425 V
• Number Of Gates: 400 K
• Package / Case: FPBGA-484
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ProASIC3 DC and Switching Characteristics
Table 2-2 • Recommended Operating Conditions
Table 2-3 • Flash Programming Limits – Retention, Storage and Operating Temperature
2 - 2
Symbol
T
T
VCC
VJTAG
VPUMP
VCCPLL
VCCI and VMV
Notes:
1. All parameters representing voltages are measured with respect to GND unless otherwise specified.
2. To ensure targeted reliability standards are met across ambient and junction operating temperatures, Actel
3. The ranges given here are for power supplies only. The recommended input voltage ranges specific to each I/O
4. V
5. 3.3 V wide range is compliant to the JDEC8b specification and supports 3.0 V VCCI operation.
Product
Grade
Commercial
Industrial
Notes:
1. This is a stress rating only; functional operation at any condition other than those indicated is not implied.
2. These limits apply for program/data retention only. Refer to
A
J
recommends that the user follow best design practices using Actel’s timing and power simulation tools.
standard are given in
conditions and absolute limits.
3
PUMP
can be left floating during operation (not programming mode).
Programmin
Ambient temperature
Junction temperature
1.5 V DC core supply voltage
JTAG DC voltage
Programming voltage
Analog power supply (PLL)
1.5 V DC supply voltage
1.8 V DC supply voltage
2.5 V DC supply voltage
3.3 V DC supply voltage
3.3 V wide range DC supply voltage
LVDS/B-LVDS/M-LVDS differential I/O
LVPECL differential I/O
Cycles
500
500
g
Table 2-18 on page
Program Retention
(biased/unbiased)
Parameter
20 years
20 years
2-19. VMV and VCCI should be at the same voltage within a given I/O bank.
Programming Mode
Operation
1,2
5
Temperature T
4
R e vi s i o n 9
Maximum Storage
Table 2-1 on page 2-1
110
110
STG
1.425 to 1.575
1.425 to 1.575
2.375 to 2.625
Commercial
(°C)
2.7 to 3.6
1.4 to 3.6
3.0 to 3.6
1.4 to 1.6
1.7 to 1.9
2.3 to 2.7
3.0 to 3.6
3.0 to 3.6
0 to +70
0 to 85
0 to 3.6
2
Junction Temperature T
and
Table 2-2
Maximum Operating
1.425 to 1.575
1.425 to 1.575
2.375 to 2.625
1
Industrial
-40 to 100
-40 to +85
2.7 to 3.6
1.4 to 3.6
3.0 to 3.6
1.4 to 1.6
1.7 to 1.9
2.3 to 2.7
3.0 to 3.6
3.0 to 3.6
0 to 3.6
for device operating
100
100
J
Units
(°C)
°C
V
V
V
V
V
V
V
V
V
V
V
V
2