STM32F103ZCT7 STMicroelectronics, STM32F103ZCT7 Datasheet - Page 122

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STM32F103ZCT7

Manufacturer Part Number
STM32F103ZCT7
Description
MCU ARM 32BIT 256KB FLSH 144LQFP
Manufacturer
STMicroelectronics
Series
STM32r
Datasheet

Specifications of STM32F103ZCT7

Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
72MHz
Connectivity
CAN, I²C, IrDA, LIN, SPI, UART/USART, USB
Peripherals
DMA, Motor Control PWM, PDR, POR, PVD, PWM, Temp Sensor, WDT
Number Of I /o
112
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 21x12b; D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
144-LFQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
STM32F103ZCT7
Manufacturer:
STMicroelectronics
Quantity:
10 000
Revision history
122/123
Table 72.
24-Sep-2009
21-Jul-2009
Date
Document revision history
Revision
6
7
Figure 1: STM32F103xC, STM32F103xD and STM32F103xE
performance line block diagram
Note 5
STM32F103xx pin
V
voltage.
Table 16: Maximum current consumption in Sleep mode, code running
from Flash or RAM
f
characteristics.
C
characteristics
32.768
Note 1
crystal.
removed from
Jitter added to
Figure 43: Recommended NRST pin protection
In
timings: t
In
timings: t
In
t
In
t
In
t
In
cycles: t
Table 52: SPI characteristics
characteristics
C
R
Table 62: DAC characteristics
buffered DAC
Figure 60: LFBGA100 - 10 x 10 mm low profile fine pitch ball grid array
package outline
pitch ball grid array package mechanical data
Number of DACs corrected in
I
consumptions in Stop and Standby
Figure 16: Typical current consumption on VBAT with RTC on vs.
temperature at different VBAT values
IEC 1000 standard updated to IEC 61000 and SAE J1752/3 updated to
IEC 61967-2 in
Table 62: DAC characteristics
HSE_ext
h(AD_NADV)
h(A_NWE)
h(CLKH-NWAITV)
DD_VBAT
RERINT
L1
ADC
AIN
Table 31: Asynchronous non-multiplexed SRAM/PSRAM/NOR read
Table 32: Asynchronous non-multiplexed SRAM/PSRAM/NOR write
Table 33: Asynchronous multiplexed PSRAM/NOR read
Table 34: Asynchronous multiplexed PSRAM/NOR write
Table 35: Synchronous multiplexed NOR/PSRAM read
Table 40: Switching characteristics for NAND Flash read and write
and C
Doc ID 14611 Rev 7
max values modified in
and R
updated and
modified below
kHz), notes modified and moved below the tables.
Table 25: HSI oscillator characteristics
h(NOE-D)
min modified in
and T
h(BL_NOE)
h(A_NWE)
updated in
modified.
L2
and t
AIN
replaced by C in
added.
Table 27: Low-power mode wakeup
Coeff
Table 28: PLL
and
and
Section 5.3.11: EMC characteristics on page
modified.
parameters modified in
and
h(A_NOE)
modified.
STM32F103xC, STM32F103xD, STM32F103xE
and t
definitions.
and t
Table 24: LSE oscillator characteristics (fLSE =
Table 54: SD / MMC
added to
modified.
Note 4
Table 17: Typical and maximum current
Table 65: LFBGA100 - 10 x 10 mm low profile fine
Figure 22: Typical application with an 8 MHz
h(Data_NWE)
h(A_NOE)
Table 21: High-speed external user clock
modified.
added in
Table 59: RAIN max for fADC = 14
Table 13: Embedded internal reference
modified. Values added to
characteristics.
Table 23: HSE 4-16 MHz oscillator
Table 3: STM32F103xx
modified.
modified. Small text changes.
Changes
updated.
modified.
modified.
modes.
Table 5: High-density
added.
Table 58: ADC
Figure 57: 12-bit buffered /non-
characteristics.
updated.
modified. Conditions
modified.
timings.
family.
characteristics.
Table 53: I2S
timings:
timings:
timings:
80.
MHz.

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