STM32F103ZCT7 STMicroelectronics, STM32F103ZCT7 Datasheet - Page 99

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STM32F103ZCT7

Manufacturer Part Number
STM32F103ZCT7
Description
MCU ARM 32BIT 256KB FLSH 144LQFP
Manufacturer
STMicroelectronics
Series
STM32r
Datasheet

Specifications of STM32F103ZCT7

Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
72MHz
Connectivity
CAN, I²C, IrDA, LIN, SPI, UART/USART, USB
Peripherals
DMA, Motor Control PWM, PDR, POR, PVD, PWM, Temp Sensor, WDT
Number Of I /o
112
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 21x12b; D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
144-LFQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
STM32F103ZCT7
Manufacturer:
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Quantity:
10 000
STM32F103xC, STM32F103xD, STM32F103xE
Equation 1: R
The formula above
error below 1/4 of LSB. Here N = 12 (from 12-bit resolution).
Table 59.
1. Guaranteed by design, not tested in production.
Table 60.
1. ADC DC accuracy values are measured after internal calibration.
2. ADC Accuracy vs. Negative Injection Current: Injecting negative current on any of the standard (non-
3. Based on characterization, not tested in production.
1.5
7.5
13.5
28.5
41.5
55.5
71.5
239.5
Symbol
R
robust) analog input pins should be avoided as this significantly reduces the accuracy of the conversion
being performed on another analog input. It is recommended to add a Schottky diode (pin to ground) to
standard analog pins which may potentially inject negative current.
Any positive injection current within the limits specified for I
affect the ADC accuracy.
EO
EG
ED
ET
EL
AIN
------------------------------------------------------------- - R
f
T
ADC
Total unadjusted error
Offset error
Gain error
Differential linearity error
Integral linearity error
s
R
(cycles)
ADC accuracy - limited test conditions
AIN
AIN
C
(Equation
ADC
Parameter
max for f
max formula
T
S
ln
1) is used to determine the maximum external impedance allowed for an
2
ADC
N
+
Doc ID 14611 Rev 7
0.11
0.54
0.96
2.04
2.96
3.96
5.11
17.1
2
= 14 MHz
f
f
V
T
Measurements made after
ADC calibration
V
ADC
PCLK2
ADC
A
DDA
REF+
= 25 °C
= 14 MHz, R
(1)
= 3 V to 3.6 V
t
= V
S
= 56 MHz,
Test conditions
(µs)
DDA
INJ(PIN)
AIN
(1)(2)
and I
< 10 k,
INJ(PIN)
0.4
5.9
11.4
25.2
37.2
50
NA
NA
Electrical characteristics
in
±1.3
±0.5
±0.7
±0.8
Typ
±1
Section 5.3.13
R
AIN
max (k)
Max
±1.5
±1.5
±1.5
±1
±2
(3)
does not
99/123
Unit
LSB

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