STM32F103ZCT7 STMicroelectronics, STM32F103ZCT7 Datasheet - Page 64

• Manufacturer Part Number: STM32F103ZCT7
• Description: MCU ARM 32BIT 256KB FLSH 144LQFP
• Manufacturer: STMicroelectronics
• Series: STM32r

Specifications of STM32F103ZCT7

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 72MHz
• Connectivity: CAN, I²C, IrDA, LIN, SPI, UART/USART, USB
• Peripherals: DMA, Motor Control PWM, PDR, POR, PVD, PWM, Temp Sensor, WDT
• Number Of I /o: 112
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 21x12b; D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 144-LFQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Electrical characteristics
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Figure 26. Asynchronous multiplexed PSRAM/NOR read waveforms
Table 33.
1. C
2. Based on characterization, not tested in production.
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
w(NE)
v(NOE_NE)
w(NOE)
h(NE_NOE)
v(A_NE)
v(NADV_NE)
w(NADV)
h(AD_NADV)
h(A_NOE)
h(BL_NOE)
v(BL_NE)
su(Data_NE)
su(Data_NOE)
h(Data_NE)
h(Data_NOE)
Symbol
L
= 15 pF.
FSMC_NBL[1:0]
FSMC_ AD[15:0]
FSMC_A[25:16]
FSMC_NADV
FSMC_NWE
FSMC_NOE
Asynchronous multiplexed PSRAM/NOR read timings
FSMC_NE
FSMC_NE low time
FSMC_NEx low to FSMC_NOE low
FSMC_NOE low time
FSMC_NOE high to FSMC_NE high hold time
FSMC_NEx low to FSMC_A valid
FSMC_NEx low to FSMC_NADV low
FSMC_NADV low time
FSMC_AD (address) valid hold time after
FSMC_NADV high
Address hold time after FSMC_NOE high
FSMC_BL hold time after FSMC_NOE high
FSMC_NEx low to FSMC_BL valid
Data to FSMC_NEx high setup time
Data to FSMC_NOE high setup time
Data hold time after FSMC_NEx high
Data hold time after FSMC_NOE high
Parameter
Doc ID 14611 Rev 7
t
t
t
v(NADV_NE)
v(A_NE)
v(A_NE)
t
t
t
v(NOE_NE)
v(BL_NE)
w(NADV)
Address
STM32F103xC, STM32F103xD, STM32F103xE
Address
t
h(AD_NADV)
t
w(NE)
NBL
t
su(Data_NOE)
t
t
w(NOE)
su(Data_NE)
7T
3T
4T
–1
3
T
T
T
0
2T
2T
0
0
Data
HCLK
HCLK
HCLK
HCLK
HCLK
HCLK
HCLK
HCLK
t
h(NE_NOE)
t
Min
h(BL_NOE)
t
h(A_NOE)
–1.5
– 2
– 0.5 3T
– 1
+ 24
+ 25
(1)(2)
7T
4T
0
5
T
0
HCLK
HCLK
HCLK
HCLK
Max
t
h(Data_NOE)
t
+ 1.5
h(Data_NE)
+ 2
+ 1.5
+ 2
ai14892b
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Unit