ISL6334ACRZR5368 Intersil, ISL6334ACRZR5368 Datasheet - Page 16

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ISL6334ACRZR5368

Manufacturer Part Number
ISL6334ACRZR5368
Description
IC CTRLR PWM 4PHASE BUCK 40QFN
Manufacturer
Intersil
Datasheet

Specifications of ISL6334ACRZR5368

Applications
Controller, Intel VR11.1
Voltage - Input
3 V ~ 12 V
Number Of Outputs
1
Voltage - Output
0.5 V ~ 1.6 V
Operating Temperature
0°C ~ 70°C
Mounting Type
*
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Channel current balance is essential in achieving the
thermal advantage of multiphase operation. With good
current balance, the power loss is equally dissipated over
multiple devices and a greater area.
Voltage Regulation
The compensation network shown in Figure 6 assures that
the steady-state error in the output voltage is limited only to
the error in the reference voltage (output of the DAC) and
offset errors in the OFS current source, remote-sense and
error amplifiers. Intersil specifies the guaranteed tolerance of
the ISL6334AR5368 to include the combined tolerances of
each of these elements.
The sensed average current I
current will develop voltage drop across the resistor between
FB and VDIFF pins for droop control. ISL6334AR5368 can not
be used for non-droop applications.
The output of the error amplifier, V
sawtooth waveforms to generate the PWM signals. The
PWM signals control the timing of the Intersil MOSFET
drivers and regulate the converter output to the specified
reference voltage. The internal and external circuitry, which
control voltage regulation, are illustrated in Figure 6.
The ISL6334AR5368 incorporates an internal differential
remote-sense amplifier in the feedback path. The amplifier
removes the voltage error encountered when measuring the
output voltage relative to the local controller ground
reference point, resulting in a more accurate means of
sensing output voltage. Connect the microprocessor sense
pins to the non-inverting input, VSEN, and inverting input,
RGND, of the remote-sense amplifier. The remote-sense
FIGURE 6. OUTPUT VOLTAGE AND LOAD-LINE
R
FB
V
V
EXTERNAL CIRCUIT
OUT
OUT
+
-
V
DROOP
C
R
REF
+
-
C
REGULATION WITH OFFSET ADJUSTMENT
R
C
REF
C
COMP
VDIFF
RGND
VSEN
DAC
REF
FB
AVG
16
ISL6334AR5368
INTERNAL CIRCUIT
I
AVG
is tied to FB internally. This
COMP
DIFFERENTIAL
REMOTE-SENSE
AMPLIFIER
ERROR AMPLIFIER
+
-
, is compared to
+
-
V
COMP
ISL6334AR5368
output, V
amplifier through an external resistor.
A digital-to-analog converter (DAC) generates a reference
voltage based on the state of logic signals at pins VID7
through VID0. The DAC decodes the eight 6-bit logic signal
(VID) into one of the discrete voltages shown in Table 2. All
VID pins have no internal pull-up current sources after t
After t
an internal 2.5V source for use with open-drain outputs. The
pull-up current diminishes to zero above the logic threshold
to protect voltage-sensitive output devices. External pull-up
resistors can augment the pull-up current sources in case
leakage into the driving device is greater than 30µA.
VID7 VID6 VID5 VID4 VID3 VID2 VID1 VID0 VOLTAGE
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
D3
, each VID input offers a minimum 30µA pull-up to
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
DIFF
, is connected to the inverting input of the error
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
TABLE 2. VR11 VID 8 BIT
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
September 7, 2010
1.60000
1.59375
1.58750
1.58125
1.57500
1.56875
1.56250
1.55625
1.55000
1.54375
1.53750
1.53125
1.52500
1.51875
1.51250
1.50625
1.50000
1.49375
1.48750
1.48125
1.47500
1.46875
1.46250
1.45625
1.45000
1.44375
1.43750
OFF
OFF
FN6839.2
D3
.

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