CR16MCS9VJE8 National Semiconductor, CR16MCS9VJE8 Datasheet - Page 151

• Manufacturer Part Number: CR16MCS9VJE8
• Description: 16-Bit Microcontroller IC
• Manufacturer: National Semiconductor

Specifications of CR16MCS9VJE8

• Controller Family/series: CR16X
• Core Size: 16 Bit
• Program Memory Size: 64K X 8 Flash
• Digital Ic Case Style: PQFP
• No. Of Pins: 80
• Mounting Type: Surface Mount
• Clock Frequency: 25MHz
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Symbol Figure
t
t
t
t
t
t
t
t
t
t
t
t
t
t
BUFi
CSTOsi
CSTRhi
CSTRsi
DHCsi
DLCsi
SCLfi
SCLri
SCLlowi
SCLhighi
SDAri
SDAfi
SDAhi
SDAsi
t
t
t
t
t
t
t
tTIOH
MSKp
MSKh
MCSh
MCSs
tTIOL
MSKs
tTAH
tTBH
MDIh
MDIs
tTAL
tTBL
t
t
Ih
Is
a. Only when operating with an external square wave on X2CKI; otherwise a 32kHz crystal network must be used
between X2CKI and X2CKO. If the slow clock is internally generated from the fast clock, it may not exceed this
given limit.
83
84
83
83
83
84
83
84
89
91
91
92
92
92
92
96
96
83
85
83
85
83
85
89
89
90
90
89
88
88
91
91
88
88
MICROWIRE Clock Period
MSK Hold (slave only)
MSK Setup (slave only)
MCS Hold (slave only)
MCS Setup (slave only)
MICROWIRE Data In Hold (master) Normal Mode: After R.E. MSK
MICROWIRE Data In Hold (slave)
MICROWIRE Data In Setup
CANRx Input setup time)
CANRx Input hold time
Bus free time between Stop and
Start Condition
SCL setup time
SCL hold time
SCL setup time
Data High setup time
Data Low setup time
SCL signal Rise time
SCL signal Fall time
SCL low time
SCL high time
SDA signal Rise time
SDA signal Fall time
SDA hold time
SDA setup time
TnA High Time
TnA Low Time
TnB High Time
TnB Low Time
TIOx Input High Time
TIOx Input Low Time
Description
Table 46 Input Signal Requirements
Multi-Function Timer Input Signals
Versatile Timer Input Signals
ACCESS.bus Input Signals
CAN Input Signals
MnIDL bit = 0; R.E. MSK to next R.E. MSK
MIDL bit = 1; F.E. MSK to next F.E. MSK
After MCS becomes inactive
Before MCS becomes active
MIDL bit = 0: After F.E. MSK
MIDL bit = 1: After R.E. MSK
MIDL bit = 0: Before R.E. MSK
MIDL bit = 1: Before F.E. MSK
Alternate Mode: After F.E. MSK
Normal Mode: After R.E. MSK
Alternate Mode: After F.E. MSK
Normal Mode: Before R.E. MSK
Alternate Mode: Before F.E. MSK
Before R.E. CLK
After R.E. CLK
Before Stop Condition
After Start Condition
Before Start Condition
Before SCL R.E.
Before SCL R.E.
After SCL F.E.
After SCL R.E.
After SCL F.E.
Before SCL R.E.
R.E. CLK
R.E. CLK
R.E. CLK
R.E. CLK
151
Reference
RE CLK
RE CLK
8*t
8*t
8*t
1.5T
1.5T
Min (ns)
t
CLK
CLK
CLK
16*t
16*t
SCLhigho
T
T
T
T
2*t
2*t
2*t
CLK
CLK
CLK
CLK
200
CLK
CLK
40
80
40
80
40
80
12
0
0
0
CLK
CLK
CLK
- t
- t
- t
CLK
CLK
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+5
+5
+5
+5
+5ns
+5ns
SCLri
SCLri
SCLri
Max (ns)
1000
1000
300
300