PIC18F2550T-I/SO Microchip Technology, PIC18F2550T-I/SO Datasheet - Page 197

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PIC18F2550T-I/SO

Manufacturer Part Number
PIC18F2550T-I/SO
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,SOP,28PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F2550T-I/SO

Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
24
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SOIC (7.5mm Width)
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
SPI, I2C, EAUSART
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
24
Number Of Timers
4
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DM163025, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 10 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
I3-DB18F4550 - BOARD DAUGHTER ICEPIC3DM163025 - PIC DEM FULL SPEED USB DEMO BRD
Lead Free Status / Rohs Status
 Details
18.3.3
Reading from the SPP involves reading the SPPDATA
register. Reading the register the first time initiates the
read operation. When the read is finished, indicated by
the SPPBUSY bit, the SPPDATA will be loaded with the
current data.
The following is an example read sequence:
1.
2.
REGISTER 18-3:
© 2009 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3-0
RDSPP
Write the 4-bit address to the SPPEPS register.
The SPP automatically starts writing the
address. If address write is not used then skip to
step 3.
Monitor the SPPBUSY bit to determine when the
address has been sent. The duration depends
on the wait states.
R-0
READING FROM THE SPP
RDSPP: SPP Read Status bit (Valid when SPPCON<SPPOWN> = 1, USB)
1 = The last transaction was a read from the SPP
0 = The last transaction was not a read from the SPP
WRSPP: SPP Write Status bit (Valid when SPPCON<SPPOWN> = 1, USB)
1 = The last transaction was a write to the SPP
0 = The last transaction was not a write to the SPP
Unimplemented: Read as ‘0’
SPPBUSY: SPP Handshaking Override bit
1 = The SPP is busy
0 = The SPP is ready to accept another read or write request
ADDR3:ADDR0: SPP Endpoint Address bits
1111 = Endpoint Address 15
0001
0000 = Endpoint Address 0
WRSPP
R-0
SPPEPS: SPP ENDPOINT ADDRESS AND STATUS REGISTER
W = Writable bit
‘1’ = Bit is set
U-0
PIC18F2455/2550/4455/4550
SPPBUSY
R-0
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
ADDR3
R/W-0
3.
4.
5.
Read the data from the SPPDATA register; the
data from the previous read operation is
returned. The SPP automatically starts the read
cycle for the next read.
Monitor the SPPBUSY bit to determine when the
data has been read. The duration depends on
the wait states.
Go back to step 3 to read the current byte from
the SPP and start the next read cycle.
ADDR2
R/W-0
x = Bit is unknown
ADDR1
R/W-0
DS39632E-page 195
ADDR0
R/W-0
bit 0

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