PN5120A0HN/C2,551 NXP Semiconductors, PN5120A0HN/C2,551 Datasheet - Page 67

• Manufacturer Part Number: PN5120A0HN/C2,551
• Description: IC TRANSMISSION MOD 40-HVQFN
• Manufacturer: NXP Semiconductors

Specifications of PN5120A0HN/C2,551

• Rf Type: Read / Write
• Frequency: 13.56MHz
• Features: ISO14443-A, ISO14443-B
• Package / Case: 40-VFQFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

NXP Semiconductors
PN512
Product data sheet
COMPANY PUBLIC
10.2.3 SPI address byte
10.3.1 Connection to a host
10.3.2 Selectable UART transfer speeds
10.3 UART interface
The first send byte defines both the mode and the address byte.
Table 143. MOSI and MISO byte order
[1]
Remark: The MSB must be sent first.
The address byte has to meet the following format.
The MSB of the first byte defines the mode used. To read data from the PN512 the MSB is
set to logic 1. To write data to the PN512 the MSB must be set to logic 0. Bits 6 to 1 define
the address and the LSB is set to logic 0.
Table 144. Address byte 0 register; address MOSI
Remark: Signals DTRQ and MX can be disabled by clearing TestPinEnReg register’s
RS232LineEn bit.
The internal UART interface is compatible with an RS232 serial interface.
The default transfer speed is 9.6 kBd. To change the transfer speed, the host controller
must write a value for the new transfer speed to the SerialSpeedReg register. Bits
BR_T0[2:0] and BR_T1[4:0] define the factors for setting the transfer speed in the
SerialSpeedReg register.
The BR_T0[2:0] and BR_T1[4:0] settings are described in
transfer speeds and the relevant register settings are given in
Line
MOSI
MISO
7 (MSB)
1 = read
0 = write
Fig 13. UART connection to microcontrollers
X = Do not care.
6
address
Byte 0
address 0
X
[1]
All information provided in this document is subject to legal disclaimers.
Rev. 3.6 — 10 March 2011
5
Byte 1
data 0
X
[1]
111336
RX
TX
DTRQ
MX
4
Byte 2
data 1
X
[1]
3
RX
TX
DTRQ
MX
PN512
To
...
...
001aan221
2
Table
Table
Byte n
data n − 1
X
9. Examples of different
[1]
Transmission module
1
10.
© NXP B.V. 2011. All rights reserved.
PN512
Byte n + 1
data n
X
[1]
0 (LSB)
0
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