PCF8562TT/2,518 NXP Semiconductors, PCF8562TT/2,518 Datasheet - Page 6

• Manufacturer Part Number: PCF8562TT/2,518
• Description: LCD Drivers LCD DRIVER 32/128SEG
• Manufacturer: NXP Semiconductors

Specifications of PCF8562TT/2,518

• Number Of Digits: 16
• Number Of Segments: 128
• Maximum Clock Frequency: 400 KHz
• Operating Supply Voltage: 1.8 V to 5.5 V
• Maximum Power Dissipation: 400 mW
• Maximum Operating Temperature: + 85 C
• Package / Case: TSSOP-48
• Maximum Supply Current: 20 uA
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 935276218518 PCF8562TT/2-T

NXP Semiconductors
PCF8562_5
Product data sheet
7.1 Power-on reset
7.2 LCD bias generator
The host microprocessor or microcontroller maintains the 2-line I
channel with the PCF8562. The internal oscillator is enabled by connecting
pin OSC to pin V
are generated internally. The only other connections required to complete the system are
to the power supplies (V
At power-on the PCF8562 resets to the following starting conditions:
Data transfers on the I
reset action to complete.
Fractional LCD biasing voltages are obtained from an internal voltage divider consisting of
three impedances connected in series between V
bypassed to provide a
voltage can be temperature compensated externally using the supply to pin V
Fig 3.
•
•
•
•
•
•
•
•
All backplane outputs are set to V
All segment outputs are set to V
The selected drive mode is: 1:4 multiplex with
Blinking is switched off
Input and output bank selectors are reset
The I
The data pointer and the subaddress counter are cleared (set to logic 0)
Display is disabled
V
V
SS
DD
CONTROLLER
PROCESSOR/
2
The resistance of the power lines must be kept to a minimum.
Typical system configuration
C-bus interface is initialized
MICRO-
MICRO-
HOST
R ≤
All information provided in this document is subject to legal disclaimers.
SS
2C
. The appropriate biasing voltages for the multiplexed LCD waveforms
t
r
b
2
1
C-bus must be avoided for 1 ms following power-on to allow the
⁄
Rev. 05 — 19 May 2010
2
DD
bias voltage level for the 1:2 multiplex configuration. The LCD
, V
SS
and V
OSC
SDA
SCL
LCD
10
11
15
LCD
16
LCD
A0
14
) and the LCD panel chosen for the application.
17
Universal LCD driver for low multiplex rates
A1
V
PCF8562
DD
18
A2
21
V
LCD
19
LCD
1
SA0
⁄
3
20
bias
and V
V
SS
32 segment drives
4 backplanes
SS
. The middle resistor can be
2
C-bus communication
PCF8562
© NXP B.V. 2010. All rights reserved.
LCD PANEL
(up to 128
elements)
001aac264
LCD
.
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