ATA6603-EK Atmel, ATA6603-EK Datasheet - Page 154

• Manufacturer Part Number: ATA6603-EK
• Description: MCU, MPU & DSP Development Tools Demoboard LIN-MCM
• Manufacturer: Atmel

Specifications of ATA6603-EK

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

154
ATA6602/ATA6603
Table 4-55
correct or the phase and frequency correct, PWM mode.
Table 4-55.
Note:
• Bit 1:0 – WGM11:0: Waveform Generation Mode
COM1A1/COM1B1
Combined with the WGM13:2 bits found in the TCCR1B Register, these bits control the
counting sequence of the counter, the source for maximum (TOP) counter value, and what
type of waveform generation to be used (see
supported by the Timer/Counter unit are: Normal mode (counter), Clear Timer on Compare
match (CTC) mode, and three types of Pulse Width Modulation (PWM) modes (see
of Operation” on page
1. A special case occurs when OCR1A/OCR1B equals TOP and COM1A1/COM1B1 is set. See
0
0
1
1
“Phase Correct PWM Mode” on page 147
shows the COM1x1:0 bit functionality when the WGM13:0 bits are set to the phase
Compare Output Mode, Phase Correct and Phase and Frequency Correct
PWM
(1)
COM1A0/COM1B0
143).
0
1
0
1
Description
Normal port operation, OC1A/OC1B disconnected.
WGM13:0 = 8, 9, 10 or 11: Toggle OC1A on Compare
Match, OC1B disconnected (normal port operation). For
all other WGM1 settings, normal port operation,
OC1A/OC1B disconnected.
Clear OC1A/OC1B on Compare Match when
up-counting. Set OC1A/OC1B on Compare Match when
downcounting.
Set OC1A/OC1B on Compare Match when up-counting.
Clear OC1A/OC1B on Compare Match when
downcounting.
for more details.
Table 4-56 on page
155). Modes of operation
4921E–AUTO–09/09
“Modes