CorePCI-AR Actel, CorePCI-AR Datasheet - Page 16

• Manufacturer Part Number: CorePCI-AR
• Description: Microcontroller Modules & Accessories CorePCI v5.41
• Manufacturer: Actel

Specifications of CorePCI-AR

• Product: Microcontroller Modules
• Data Bus Width: 32 bit, 64 bit
• Clock Speed: 66 MHz
• Flash: 256 Bytes
• Timers: 1

Table 11 • Memory Base Address Register Bit Definition
(Locations 10h or 14h)
Table 12 • I/O Base Address Register Bit Definitions
(Location 14h Only)
Table 13 • Capabilities Pointer (34h)
Table 14 • Interrupt Register (3Ch)
1 6
Bit
0
2–1
3
23–4
31–24
Note: The description for bit values 31–24 and 23–4 will vary
Bit
0
1
7–2
31–8
Note: The description for bit values 31–8 and 7–2 will vary
Bit
7–0
31–8
Note: This register is not required if hot-swap is not enabled.
Bit
7–0
15–8
CorePCI v5.41
depending on the actual memory size defined in the
customization options. See
page 19
depending on the actual memory size defined in the
customization options. See
page 19
See
information.
Type
RO
RO
RO
RO
RW
Type
RO
RO
RO
RW
Type
RO
RW
Type
RW
RO
"Customization Options" on page 19
for more information.
for more information.
Description
Set to '0' to indicate memory space.
Set to '00' to indicate mapping into any 32-bit
address space.
Set to a '1' Indicating prefetch allowed on
reads.
Indicates a 16 MB address space. It is set to all
'0's.
Programmable location for 16 MB address
space. To determine a hit, these bits must be
compared to PCI address bits 31–24.
Description
Set to '1' to indicate I/O space.
Reserved. It is set to '0'.
256-byte I/O space for this peripheral. It is set
to all '0's.
Programmable address for this peripheral’s I/O
space. To determine a hit, these bits must be
compared to PCI address bits 31–8.
Description
Set to '10000000'b when the customization
constant, HOT_SWAP_EN, is set to a '1';
otherwise, it is all zeroes.
Reserved. It is set to '0'.
Description
Required read/write register. This register has
no impact on internal logic.
Set to '00000001'b to indicate INTAn.
"Customization Options" on
"Customization Options" on
for more
v4.0
Table 15 • Interrupt Control/Status Register (48h)
Table 16 • Optional Hot-Swap Register (80h)
Bit
7–0
8
9
31–10
Bit
7–0
8
9
10
11
13–12
14
15
23–16
31–24
Type
RO
RW
RW
RO
Type
RO
RO
RW
RO
RW
RO
RW
RW
RO
RO
Description
Reserved. It is set to all zeroes.
A '1' in this bit indicates an active external
interrupt condition (assertion of EXT_INTn).
The user can clear it by writing a '1' to the bit
position. It is set to '0' after reset.
Writing a '1' to this bit enables support for the
external interrupt signal. Writing a '0' to this
bit disables external interrupt support.
Reserved. It is set to '0'.
Description
Reserved. It is set to all zeroes.
Reserved. It is set to '0'.
ENUM# Signal Mask.
Reserved. It is set to '0'.
LED ON/OFF. When set to a '1', this bit is used
to drive a blue LED indicating that it is safe to
extract the card.
Reserved. It is set to '0'.
ENUM# Insertion Status.
ENUM# Insertion Status.
The next item located in the capabilities list.
Set to '0' in the baseline core.
Set to '06'h to indicate hot-swap capability.