CorePCI-AR Actel, CorePCI-AR Datasheet - Page 5

• Manufacturer Part Number: CorePCI-AR
• Description: Microcontroller Modules & Accessories CorePCI v5.41
• Manufacturer: Actel

Specifications of CorePCI-AR

• Product: Microcontroller Modules
• Data Bus Width: 32 bit, 64 bit
• Clock Speed: 66 MHz
• Flash: 256 Bytes
• Timers: 1

Utilization Statistics
Utilization statistics are given in
Table 3
counts for each of the core variations and options listed
in
and C module counts for the SX, SX-A, RTSX-S, and
Axcelerator families. The Flash column indicates the tile
Table 3 • Utilization Statistics for CorePCI
Table 4 • Core I/O Requirements
Function
32-Bit Target Controller
64-Bit Target Controller
32-Bit Master Controller
64-Bit Master Controller
32-Bit Target+DMA Controller
64-Bit Target+DMA Controller
32-Bit Target/Master Controller
64-Bit Target/Master Controller
SDRAM Controller
BAR #1 Support
DMA Mapped into I/O
Notes:
1. The sequential number is the R-module usage and the combinatorial number is the C-module usage.
2. Total number of tiles required.
3. Only applicable to Target+DMA functions.
32-Bit Target Controller
64-Bit Target Controller
32-Bit Master Controller
64-Bit Master Controller
32-Bit Target+DMA Controller
64-Bit Target+DMA Controller
32-Bit Target+Master Controller
64-Bit Target+Master Controller
Note: *Assumes all the backend I/O pins as listed in the data sheet are connected to I/O pins rather than to internal FPGA logic.
Table
gives a detailed breakdown of the actual gate
3. The antifuse column indicates the typical R
Core
3
Table 2 on page
Sequential
262
480
600
400
554
470
570
350
70
30
30
PCI
48
87
50
89
50
89
50
89
Combinatorial
Antifuse
4.
v4.0
1087
1050
1000
528
810
850
900
130
560
70
90
Minimum
counts for the ProASIC
These are typical numbers and will vary based on the
synthesis tools and constraints used. Each backend
requires different amounts of logic depending on the
complexity of the controller. An SDRAM controller is
included as an example.
1
1
1
1
1
1
1
1
1
Backend
Total
1290
1600
1250
1641
1370
1620
790
910
200
100
120
Standard*
I/O Count
113
122
113
122
74
83
74
83
ProASIC
PLUS
Flash
Tiles
1218
1900
1904
2437
230
140
120
N/A
N/A
N/A
N/A
Minimum
and ProASIC3/E families.
PLUS
2
49
88
51
90
51
90
51
90
Total
ProASIC3/E
CorePCI v5.41
Standard*
Flash
Tiles
1194
1266
1862
2590
1866
2815
2389
2720
225
137
117
122
200
133
211
124
202
133
211
2
5