CY7C1381D-133AXI Cypress Semiconductor Corp, CY7C1381D-133AXI Datasheet - Page 22

• Manufacturer Part Number: CY7C1381D-133AXI
• Description: IC,SYNC SRAM,512KX36,CMOS,QFP,100PIN,PLASTIC
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY7C1381D-133AXI

• Format - Memory: RAM
• Memory Type: SRAM - Synchronous
• Memory Size: 18M (512K x 36)
• Speed: 133MHz
• Interface: Parallel
• Voltage - Supply: 3.135 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 428-2147; CY7C1381D-133AXI

Timing Diagrams
Document #: 38-05544 Rev. *F
Note:
Write Cycle Timing
27. Full width write can be initiated by either GW LOW; or by GW HIGH, BWE LOW and BW
Data Out (Q)
Data in (D)
ADDRESS
BWE,
BW
ADSP
ADSC
GW
ADV
CE
CLK
OE
X
BURST READ
High-Z
t ADS
[26, 27]
t CES
t AS
(continued)
A1
t ADH
t CEH
t
t AH
t
CH
OEHZ
Byte write signals are ignored for first cycle when
ADSP initiates burst
t CYC
t ADS
t
Single WRITE
CL
t
DS
D(A1)
t ADH
t
DH
A2
D(A2)
DON’T CARE
D(A2 + 1)
t
WES
BURST WRITE
t
WEH
D(A2 + 1)
UNDEFINED
ADV suspends burst
X
LOW.
D(A2 + 2)
ADSC extends burst
D(A2 + 3)
CY7C1381D, CY7C1381F
CY7C1383D, CY7C1383F
t ADS
A3
D(A3)
t ADH
t ADVS
Extended BURST WRITE
t WES
D(A3 + 1)
t ADVH
t WEH
D(A3 + 2)
Page 22 of 29
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