CS1D-IC102D Omron, CS1D-IC102D Datasheet - Page 369

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CS1D-IC102D

Manufacturer Part Number
CS1D-IC102D
Description
CS1D Dual IO Control Unit
Manufacturer
Omron
Datasheet

Specifications of CS1D-IC102D

Lead Free Status / Rohs Status
Lead free / RoHS Compliant
CPU Unit Operation
334
Note
1. The I/O memory is held or cleared according to the status of the IOM Host
2. The forced status held or cleared according to the status of the Force Sta-
3. If online editing is performed, but the power supply to the CPU Unit is
Bit and the setting for IOM Hold Bit Status at Startup in the PLC Setup
(read only when power is turned ON).
Note I/O memory treatment depends on the status of the IOM Hold Bit at
tus Hold Bit and the setting for Forced Status Hold Bit Status at Startup in
the PLC Setup.
Note Force status treatment depends on the status of the Forced Status
turned OFF before the CPU Unit has completed backup processing, the
user program will require restoring when the power supply is turned ON
again. The BKUP indicator will light to indicate this. Refer to 6-6-10 Flash
Memory in the Programming Manual (W394) for details.
PLC Setup setting
IOM Hold Bit Status
at Startup
(Programming Con-
sole address:
Word 80, bit 15)
PLC Setup setting
Forced Status Hold
Bit Status at Star-
tup
(Programming Con-
sole address:
Word 80, bit 14)
the time the operating mode is changed (to or from PROGRAM
mode).
Hold Bit at the time the operating mode is changed (to or from
PROGRAM mode).
Auxiliary bit
Auxiliary bit
Clear
(OFF)
Hold
(ON)
Clear
(OFF)
Hold
(ON)
At power ON: Clear
At mode change: Clear
At power ON: Clear
At mode change: Clear
Clear (OFF)
Clear (OFF)
Forced Status Hold Bit (A50013)
IOM Hold Bit (A50012)
At power ON: Clear
At mode change: Hold
At power ON: Hold
At mode change: Hold
At power ON: Clear
At mode change: Hold
At power ON: Hold
At mode change: Hold
Hold (ON)
Hold (ON)
Section 9-1

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