PMN50XP,165 NXP Semiconductors, PMN50XP,165 Datasheet - Page 2

MOSFET P-CH 20V 4.8A 6TSOP

PMN50XP,165

Manufacturer Part Number
PMN50XP,165
Description
MOSFET P-CH 20V 4.8A 6TSOP
Manufacturer
NXP Semiconductors
Series
TrenchMOS™r
Datasheet

Specifications of PMN50XP,165

Package / Case
SC-74-6
Fet Type
MOSFET P-Channel, Metal Oxide
Fet Feature
Logic Level Gate
Rds On (max) @ Id, Vgs
60 mOhm @ 2.8A, 4.5V
Drain To Source Voltage (vdss)
20V
Current - Continuous Drain (id) @ 25° C
4.8A
Vgs(th) (max) @ Id
950mV @ 250µA
Gate Charge (qg) @ Vgs
10nC @ 4.5V
Input Capacitance (ciss) @ Vds
1020pF @ 20V
Power - Max
2.2W
Mounting Type
Surface Mount
Minimum Operating Temperature
- 55 C
Configuration
Single Quad Drain
Transistor Polarity
P-Channel
Resistance Drain-source Rds (on)
0.06 Ohm @ 4.5 V
Drain-source Breakdown Voltage
20 V
Gate-source Breakdown Voltage
12 V
Continuous Drain Current
4.8 A
Power Dissipation
2200 mW
Maximum Operating Temperature
+ 150 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
934058528165
PMN50XP /T2
PMN50XP /T2

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PMN50XP,165
Manufacturer:
VISHAY
Quantity:
9
NXP Semiconductors
2. Pinning information
Table 2.
3. Ordering information
Table 3.
4. Limiting values
Table 4.
In accordance with the Absolute Maximum Rating System (IEC 60134).
PMN50XP_2
Product data sheet
Pin
1
2
3
4
5
6
Type number
PMN50XP
Symbol Parameter
V
V
V
I
I
P
T
T
Source-drain diode
I
I
D
DM
S
SM
stg
j
DS
DGR
GS
tot
drain-source voltage
drain-gate voltage
gate-source voltage
drain current
peak drain current
total power dissipation
storage temperature
junction temperature
source current
peak source current
Pinning
Symbol
D
D
G
S
D
D
Ordering information
Limiting values
Package
Name
TSOP6
Description
drain
drain
gate
source
drain
drain
Description
plastic surface-mounted package (TSOP6); 6 leads
Conditions
T
T
T
T
T
T
T
T
j
j
sp
sp
sp
sp
sp
sp
≥ 25 °C; T
≥ 25 °C; T
= 25 °C; V
= 100 °C; V
= 25 °C; t
= 25 °C; see
= 25 °C
= 25 °C; t
Rev. 02 — 2 October 2007
j
j
p
p
≤ 150 °C
≤ 150 °C; R
GS
< 10 μs; pulsed; see
≤ 10 μs; pulsed
GS
Figure 2
= -4.5 V; see
= -4.5 V
Simplified outline
GS
= 20 kΩ
Figure 1
P-channel TrenchMOS extremely low level FET
1
Figure 3
6
and
5
2
4
3
3
-12
-55
-
Min
-
-
-
-
-
-
-55
-
Graphic Symbol
PMN50XP
G
Max
-20
-20
12
-4.8
-3
-19.4
2.2
150
150
-1.9
-7.5
© NXP B.V. 2007. All rights reserved.
003aaa671
D
S
Version
SOT457
Unit
V
V
V
A
A
A
W
°C
°C
A
A
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