PIC24FJ64GA306-I/MR Microchip Technology, PIC24FJ64GA306-I/MR Datasheet - Page 178

• Manufacturer Part Number: PIC24FJ64GA306-I/MR
• Description: 16-bit, 16 MIPS, 64 KB Flash, 8 KB RAM, 53 I/O, LCD, XLP W/Vbat 64 QFN 9x9x0.9mm
• Manufacturer: Microchip Technology

PIC24FJ128GA310 FAMILY
11.4.6
The PIC24FJ128GA310 family of devices implements
a total of 35 registers for remappable peripheral
configuration:
• Input Remappable Peripheral Registers (19)
• Output Remappable Peripheral Registers (16)
REGISTER 11-7:
REGISTER 11-8:
DS39996F-page 178
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-14
bit 13-8
bit 7-0
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-14
bit 13-8
bit 7-6
bit 5-0
U-0
U-0
U-0
U-0
—
—
—
—
PERIPHERAL PIN SELECT
REGISTERS
Unimplemented: Read as ‘0’
INT1R<5:0>: Assign External Interrupt 1 (INT1) to Corresponding RPn or RPIn Pin bits
Unimplemented: Read as ‘0’
Unimplemented: Read as ‘0’
INT3R<5:0>: Assign External Interrupt 3 (INT3) to Corresponding RPn or RPIn Pin bits
Unimplemented: Read as ‘0’
INT2R<5:0>: Assign External Interrupt 2 (INT2) to Corresponding RPn or RPIn Pin bits
U-0
U-0
U-0
U-0
—
—
—
—
RPINR0: PERIPHERAL PIN SELECT INPUT REGISTER 0
RPINR1: PERIPHERAL PIN SELECT INPUT REGISTER 1
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
INT1R5
INT3R5
INT2R5
R/W-1
R/W-1
R/W-1
U-0
—
INT1R4
INT3R4
INT2R4
R/W-1
R/W-1
R/W-1
U-0
—
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
INT1R3
INT3R3
INT2R3
R/W-1
R/W-1
R/W-1
U-0
—
Note:
Input and output register values can only
be changed if IOLOCK (OSCCON<6>) = 0.
See
Lock”
INT1R2
INT3R2
INT2R2
R/W-1
R/W-1
R/W-1
U-0
—
Section 11.4.4.1 “Control Register
for a specific command sequence.
 2010-2011 Microchip Technology Inc.
x = Bit is unknown
x = Bit is unknown
INT1R1
INT3R1
INT2R1
R/W-1
R/W-1
R/W-1
U-0
—
INT1R0
INT3R0
INT2R0
R/W-1
R/W-1
R/W-1
U-0
—
bit 8
bit 0
bit 8
bit 0