PIC24FJ64GA306-I/MR Microchip Technology, PIC24FJ64GA306-I/MR Datasheet - Page 289

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PIC24FJ64GA306-I/MR

Manufacturer Part Number
PIC24FJ64GA306-I/MR
Description
16-bit, 16 MIPS, 64 KB Flash, 8 KB RAM, 53 I/O, LCD, XLP W/Vbat 64 QFN 9x9x0.9mm
Manufacturer
Microchip Technology
Datasheet
23.0
FIGURE 23-1:
FIGURE 23-2:
 2010-2011 Microchip Technology Inc.
Note:
Note 1: n = PLEN<4:1> + 1.
Shift Buffer
32-BIT PROGRAMMABLE
CYCLIC REDUNDANCY CHECK
(CRC) GENERATOR
CRCDATH
Section
This data sheet summarizes the features of
this group of PIC24F devices. It is not
intended to be a comprehensive reference
source. For more information, refer to the
“PIC24F
Cyclic
(DS39729). The information in this data
sheet supersedes the information in the
FRM.
Data
(4x32, 8x16 or 16x8)
CRC Shift Engine
Variable FIFO
Shift Buffer
Redundancy
41.
Family
CRC BLOCK DIAGRAM
CRC SHIFT ENGINE DETAIL
X0
CRCDATL
“32-Bit
Reference
Bit 0
Check
Shifter Clock
Programmable
2 * F
LENDIAN
CY
0
1
Manual”,
CRCWDATH
(CRC)”
PIC24FJ128GA310 FAMILY
X1
Read/ W rite Bus
CRCWDATH
CRC Shift Engine
Bit 1
The 32-bit programmable CRC generator provides a
hardware implemented method of quickly generating
checksums for various networking and security
applications. It offers the following features:
• User-programmable CRC polynomial equation,
• Programmable shift direction (little or big-endian)
• Independent data and polynomial lengths
• Configurable interrupt output
• Data FIFO
Figure 23-1
CRC generator. A simple version of the CRC shift
engine is displayed in
up to 32 bits
FIFO Empty
Event
CRCWDATL
displays a simplified block diagram of the
CRCWDATL
Figure
Xn
(1)
23-2.
Complete
Event
Shift
CRCISEL
DS39996F-page 289
Bit n
1
0
(1)
CRC
Interrupt

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