PIC24FJ64GA306-I/MR Microchip Technology, PIC24FJ64GA306-I/MR Datasheet - Page 239

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PIC24FJ64GA306-I/MR

Manufacturer Part Number
PIC24FJ64GA306-I/MR
Description
16-bit, 16 MIPS, 64 KB Flash, 8 KB RAM, 53 I/O, LCD, XLP W/Vbat 64 QFN 9x9x0.9mm
Manufacturer
Microchip Technology
Datasheet
REGISTER 17-2:
REGISTER 17-3:
 2010-2011 Microchip Technology Inc.
bit 4
bit 3
bit 2
bit 1
bit 0
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-10
bit 9-0
AMSK7
R/W-0
U-0
P: Stop bit
1 = Indicates that a Stop bit has been detected last
0 = Stop bit was not detected last
Hardware is set or clear when Start, Repeated Start or Stop is detected.
S: Start bit
1 = Indicates that a Start (or Repeated Start) bit has been detected last
0 = Start bit was not detected last
Hardware is set or clear when Start, Repeated Start or Stop is detected.
R/W: Read/Write Information bit (when operating as I
1 = Read: Indicates the data transfer is output from the slave
0 = Write: Indicates the data transfer is input to the slave
Hardware is set or clear after the reception of an I
RBF: Receive Buffer Full Status bit
1 = Receive is complete, I2CxRCV is full
0 = Receive is not complete, I2CxRCV is empty
Hardware is set when I2CxRCV is written with the received byte; hardware is clear when the software
reads I2CxRCV.
TBF: Transmit Buffer Full Status bit
1 = Transmit is in progress, I2CxTRN is full
0 = Transmit is complete, I2CxTRN is empty
Hardware is set when software writes to I2CxTRN; hardware is clear at the completion of data transmission.
Unimplemented: Read as ‘0’
AMSK<9:0>: Mask for Address Bit x Select bits
1 = Enables masking for bit x of the incoming message address; bit match is not required in this position
0 = Disables masking for bit x; bit match is required in this position
AMSK6
R/W-0
U-0
I2CxSTAT: I2Cx STATUS REGISTER (CONTINUED)
I2CxMSK: I2Cx SLAVE MODE ADDRESS MASK REGISTER
W = Writable bit
‘1’ = Bit is set
AMSK5
R/W-0
U-0
PIC24FJ128GA310 FAMILY
AMSK4
R/W-0
U-0
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
AMSK3
R/W-0
2
U-0
C device address byte.
2
C slave)
AMSK2
R/W-0
U-0
x = Bit is unknown
AMSK9
AMSK1
R/W-0
R/W-0
DS39996F-page 239
AMSK8
AMSK0
R/W-0
R/W-0
bit 8
bit 0

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