PIC24FJ64GA306-I/MR Microchip Technology, PIC24FJ64GA306-I/MR Datasheet - Page 91

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PIC24FJ64GA306-I/MR

Manufacturer Part Number
PIC24FJ64GA306-I/MR
Description
16-bit, 16 MIPS, 64 KB Flash, 8 KB RAM, 53 I/O, LCD, XLP W/Vbat 64 QFN 9x9x0.9mm
Manufacturer
Microchip Technology
Datasheet
REGISTER 7-1:
 2010-2011 Microchip Technology Inc.
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
Note 1:
2:
3:
4:
All of the Reset status bits may be set or cleared in software. Setting one of these bits in software does not
cause a device Reset.
If the LPCFG Configuration bit is 1’ (unprogrammed), the retention regulator is disabled and the RETEN bit
has no effect.
Re-enabling the regulator after it enters Standby mode will add a delay, T
Sleep. Applications that do not use the voltage regulator should set this bit to prevent this delay from
occurring.
If the FWDTEN Configuration bit is ‘1’ (unprogrammed), the WDT is always enabled, regardless of the
SWDTEN bit setting.
SWDTEN: Software Enable/Disable of WDT bit
1 = WDT is enabled
0 = WDT is disabled
WDTO: Watchdog Timer Time-out Flag bit
1 = WDT time-out has occurred
0 = WDT time-out has not occurred
SLEEP: Wake From Sleep Flag bit
1 = Device has been in Sleep mode
0 = Device has not been in Sleep mode
IDLE: Wake-up From Idle Flag bit
1 = Device has been in Idle mode
0 = Device has not been in Idle mode
BOR: Brown-out Reset Flag bit
1 = A Brown-out Reset has occurred (also set after a Power-on Reset).
0 = A Brown-out Reset has not occurred
POR: Power-on Reset Flag bit
1 = A Power-on Reset has occurred
0 = A Power-on Reset has not occurred
RCON: RESET CONTROL REGISTER (CONTINUED)
(1)
(1)
PIC24FJ128GA310 FAMILY
(1)
(1)
(1)
(4)
VREG
, when waking up from
DS39996F-page 91

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