PIC24FJ64GA306-I/MR Microchip Technology, PIC24FJ64GA306-I/MR Datasheet - Page 83

• Manufacturer Part Number: PIC24FJ64GA306-I/MR
• Description: 16-bit, 16 MIPS, 64 KB Flash, 8 KB RAM, 53 I/O, LCD, XLP W/Vbat 64 QFN 9x9x0.9mm
• Manufacturer: Microchip Technology

6.0
The PIC24FJ128GA310 family of devices contains
internal Flash program memory for storing and execut-
ing application code. The program memory is readable,
writable and erasable. The Flash can be programmed
in four ways:
• In-Circuit Serial Programming™ (ICSP™)
• Run-Time Self-Programming (RTSP)
• JTAG
• Enhanced In-Circuit Serial Programming
ICSP allows a PIC24FJ128GA310 family device to be
serially programmed while in the end application circuit.
This is simply done with two lines for the programming
clock and programming data (named PGECx and
PGEDx, respectively), and three other lines for power
(V
allows
unprogrammed devices and then program the
FIGURE 6-1:
 2010-2011 Microchip Technology Inc.
Note:
(Enhanced ICSP)
DD
), ground (V
customers
FLASH PROGRAM MEMORY
Section
This data sheet summarizes the features of
this group of PIC24F devices. It is not
intended to be a comprehensive reference
source. For more information, refer to the
“PIC24F
(DS39715). The information in this data
sheet supersedes the information in the
FRM.
User/Configuration
Space Select
SS
) and Master Clear (MCLR). This
to
Family
ADDRESSING FOR TABLE REGISTERS
4.
manufacture
Using
Program
Counter
Using
Table
Instruction
“Program
Reference
1/0
0
boards
Memory”
Manual”,
TBLPAG Reg
PIC24FJ128GA310 FAMILY
8 Bits
with
Program Counter
24-Bit EA
24 Bits
microcontroller just before shipping the product. This
also allows the most recent firmware or a custom
firmware to be programmed.
RTSP is accomplished using TBLRD (table read) and
TBLWT (table write) instructions. With RTSP, the user
may write program memory data in blocks of 64 instruc-
tions (192 bytes) at a time and erase program memory
in blocks of 512 instructions (1536 bytes) at a time.
6.1
Regardless of the method used, all programming of
Flash memory is done with the table read and write
instructions. These allow direct read and write access to
the program memory space from the data memory while
the device is in normal operating mode. The 24-bit target
address in the program memory is formed using the
TBLPAG<7:0> bits and the Effective Address (EA) from
a W register, specified in the table instruction, as shown
in
The TBLRDL and the TBLWTL instructions are used to
read or write to bits<15:0> of program memory.
TBLRDL and TBLWTL can access program memory in
both Word and Byte modes.
The TBLRDH and TBLWTH instructions are used to read
or write to bits<23:16> of program memory. TBLRDH
and TBLWTH can also access program memory in Word
or Byte mode.
Figure
Working Reg EA
Table Instructions and Flash
Programming
16 Bits
6-1.
0
Byte
Select
DS39996F-page 83