PIC24FJ64GA306-I/MR Microchip Technology, PIC24FJ64GA306-I/MR Datasheet - Page 203

• Manufacturer Part Number: PIC24FJ64GA306-I/MR
• Description: 16-bit, 16 MIPS, 64 KB Flash, 8 KB RAM, 53 I/O, LCD, XLP W/Vbat 64 QFN 9x9x0.9mm
• Manufacturer: Microchip Technology

REGISTER 13-2:
 2010-2011 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14
bit 13
bit 12-7
bit 6
bit 5-4
bit 3-2
bit 1
bit 0
Note 1:
TON
R/W-0
U-0
—
2:
3:
(1)
operation; all timer functions are set through T2CON and T4CON.
When 32-bit operation is enabled (T2CON<3> or T4CON<3> = 1), these bits have no effect on Timery
If TCS = 1, RPINRx (TxCK) must be configured to an available RPn/RPIn pin. See
Pin Select (PPS)”
Changing the value of TyCON while the timer is running (TON = 1) causes the timer prescale counter to
reset and is not recommended.
TON: Timery On bit
1 = Starts 16-bit Timery
0 = Stops 16-bit Timery
Unimplemented: Read as ‘0’
TSIDL: Stop in Idle Mode bit
1 = Discontinue module operation when device enters Idle mode
0 = Continue module operation in Idle mode
Unimplemented: Read as ‘0’
TGATE: Timery Gated Time Accumulation Enable bit
When TCS = 1:
This bit is ignored.
When TCS = 0:
1 = Gated time accumulation is enabled
0 = Gated time accumulation is disabled
TCKPS<1:0>: Timery Input Clock Prescale Select bits
11 = 1:256
10 = 1:64
01 = 1:8
00 = 1:1
Unimplemented: Read as ‘0’
TCS: Timery Clock Source Select bit
1 = External clock from pin, TyCK (on the rising edge)
0 = Internal clock (F
Unimplemented: Read as ‘0’
TGATE
R/W-0
U-0
—
TyCON: TIMER3 AND TIMER5 CONTROL REGISTER
(1)
for more information.
W = Writable bit
‘1’ = Bit is set
TCKPS1
TSIDL
R/W-0
R/W-0
(1)
OSC
(1)
(1)
/2)
(1)
TCKPS0
PIC24FJ128GA310 FAMILY
R/W-0
U-0
—
(1,2)
(1)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U-0
U-0
—
—
(1)
(1)
U-0
U-0
—
—
(3)
x = Bit is unknown
TCS
Section 11.4 “Peripheral
R/W-0
U-0
—
(1,2)
DS39996F-page 203
U-0
U-0
—
—
bit 8
bit 0