PIC24FJ64GA306-I/MR Microchip Technology, PIC24FJ64GA306-I/MR Datasheet - Page 208

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PIC24FJ64GA306-I/MR

Manufacturer Part Number
PIC24FJ64GA306-I/MR
Description
16-bit, 16 MIPS, 64 KB Flash, 8 KB RAM, 53 I/O, LCD, XLP W/Vbat 64 QFN 9x9x0.9mm
Manufacturer
Microchip Technology
Datasheet
PIC24FJ128GA310 FAMILY
REGISTER 14-2:
DS39996F-page 208
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-9
bit 8
bit 7
bit 6
bit 5
Note 1:
ICTRIG
R/W-0
U-0
2:
Use these inputs as trigger sources only and never as sync sources.
Never use an IC module as its own trigger source, by selecting this mode.
Unimplemented: Read as ‘0’
IC32: Cascade Two IC Modules Enable bit (32-bit operation)
1 = ICx and ICy operate in cascade as a 32-bit module (this bit must be set in both modules)
0 = ICx functions independently as a 16-bit module
ICTRIG: ICx Sync/Trigger Select bit
1 = Trigger ICx from the source designated by the SYNCSELx bits
0 = Synchronize ICx with the source designated by the SYNCSELx bits
TRIGSTAT: Timer Trigger Status bit
1 = Timer source has been triggered and is running (set in hardware, can be set in software)
0 = Timer source has not been triggered and is being held clear
Unimplemented: Read as ‘0’
TRIGSTAT
R/W-0 HS
U-0
ICxCON2: INPUT CAPTURE x CONTROL REGISTER 2
HS = Hardware Settable bit
W = Writable bit
‘1’ = Bit is set
U-0
U-0
SYNCSEL4
R/W-0
U-0
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
SYNCSEL3
R/W-1
U-0
SYNCSEL2
R/W-1
U-0
 2010-2011 Microchip Technology Inc.
x = Bit is unknown
SYNCSEL1
R/W-0
U-0
SYNCSEL0
R/W-0
R/W-1
IC32
bit 8
bit 0

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