16 Bit MCU 40MIPS 64 KB FLASH 28 QFN-S 6x6mm T/R

PIC24HJ64GP502T-I/MM

Manufacturer Part NumberPIC24HJ64GP502T-I/MM
Description16 Bit MCU 40MIPS 64 KB FLASH 28 QFN-S 6x6mm T/R
ManufacturerMicrochip Technology
SeriesPIC® 24H
PIC24HJ64GP502T-I/MM datasheets
 

Specifications of PIC24HJ64GP502T-I/MM

Core ProcessorPICCore Size16-Bit
Speed40 MIPsConnectivityCAN, I²C, IrDA, LIN, PMP, SPI, UART/USART
PeripheralsBrown-out Detect/Reset, DMA, POR, PWM, WDTNumber Of I /o21
Program Memory Size64KB (22K x 24)Program Memory TypeFLASH
Ram Size8K x 8Voltage - Supply (vcc/vdd)3 V ~ 3.6 V
Data ConvertersA/D 10x10b/12bOscillator TypeInternal
Operating Temperature-40°C ~ 85°CPackage / Case28-QFN
Processor SeriesPIC24HJCorePIC
Data Bus Width16 bitData Ram Size8 KB
Interface TypeI2C, SPI, UARTMaximum Clock Frequency40 MHz
Number Of Programmable I/os21Number Of Timers5
Maximum Operating Temperature+ 85 CMounting StyleSMD/SMT
3rd Party Development Tools52713-733, 52714-737, 53276-922, EWDSPICDevelopment Tools By SupplierPG164130, DV164035, DV244005, DV164005, PG164120, DM300027
Minimum Operating Temperature- 40 COn-chip Adc10 bit, 10 Channel / 12 bit, 10 Channel
Lead Free Status / RoHS StatusLead free / RoHS CompliantFor Use WithAC164336 - MODULE SOCKET FOR PM3 28/44QFN
Eeprom Size-  
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FIGURE 3-3:
ENTERING ENHANCED ICSP™ MODE
P6
P14
MCLR
V
DD
PGDx
PGCx
P18
3.4
Blank Check
The term “Blank Check” implies verifying that the
device has been successfully erased and has no
programmed memory locations. A blank or erased
memory location is always read as ‘1’.
The Device ID registers (0xFF0000:0xFF0002) can be
ignored by the Blank Check since this region stores
device information that cannot be erased. The device
Configuration registers are also ignored by the Blank
Check. Additionally, all unimplemented memory space
should be ignored from the Blank Check.
The QBLANK command is used for the Blank Check. It
determines if the code memory is erased by testing
these memory regions. A ‘BLANK’ or ‘NOT BLANK’
response is returned. If it is determined that the device
is not blank, it must be erased before attempting to
program the chip.
DS70152H-page 10
V
IH
Program/Verify Entry Code = 0x4D434850
0
1
0
0
1
0
...
b31
b30
b29
b28
b27
b3
P1A
P1B
3.5
Code Memory Programming
3.5.1
PROGRAMMING METHODOLOGY
Code memory is programmed with the PROGP
command. PROGP programs one row of code memory
starting from the memory address specified in the
command. The number of PROGP commands required
to program a device depends on the number of write
blocks that must be programmed in the device.
A flowchart for programming code memory is illustrated
in
Figure
3-4. In this example, all 88K instruction words
of a dsPIC33F/PIC24H device are programmed. First,
the
number
‘RemainingCmds’ in the flowchart) is set to 1368 and
the destination address (called ‘BaseAddress’) is set to
‘0’. Next, one write block in the device is programmed
with a PROGP command. Each PROGP command
contains data for one row of code memory of the
dsPIC33F/PIC24H.
processed
decremented by ‘1’ and compared with ‘0’. Since there
are more PROGP commands to send, ‘BaseAddress’ is
incremented by 0x80 to point to the next row of
memory.
On the second PROGP command, the second row is
programmed. This process is repeated until the entire
device is programmed.
Note:
If a bootloader needs to be programmed,
the
programmed into the first page of code
memory. For example, if a bootloader
located at address 0x200 attempts to
erase the first page, it would inadvertently
erase
bootloader into the second page (e.g.,
0x400).
P19
P7
V
IH
0
0
0
b2
b1
b0
of
commands
to
send
(called
After
the
first
command
successfully,
‘RemainingCmds’
bootloader
code
must
not
be
itself.
Instead,
program
the
© 2010 Microchip Technology Inc.
is
is