SST25VF020B-80-4C-SAE-T Microchip Technology, SST25VF020B-80-4C-SAE-T Datasheet - Page 12

2.7V To 3.6V 2Mbit SPI Serial Flash 8 SOIC 3.90mm (.150") T/R

SST25VF020B-80-4C-SAE-T

Manufacturer Part Number
SST25VF020B-80-4C-SAE-T
Description
2.7V To 3.6V 2Mbit SPI Serial Flash 8 SOIC 3.90mm (.150") T/R
Manufacturer
Microchip Technology
Datasheet

Specifications of SST25VF020B-80-4C-SAE-T

Format - Memory
FLASH
Memory Type
FLASH
Memory Size
2M (256K x 8)
Speed
80MHz
Interface
SPI Serial
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
0°C ~ 70°C
Package / Case
8-SOIC (0.154", 3.90mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
A Microchip Technology Company
©2011 Silicon Storage Technology, Inc.
High-Speed-Read (80 MHz)
The High-Speed-Read instruction supporting up to 80 MHz Read is initiated by executing an 8-bit com-
mand, 0BH, followed by address bits [A
duration of the High-Speed-Read cycle. See Figure 6 for the High-Speed-Read sequence.
Following a dummy cycle, the High-Speed-Read instruction outputs the data starting from the speci-
fied address location. The data output stream is continuous through all addresses until terminated by a
low to high transition on CE#. The internal address pointer will automatically increment until the high-
est memory address is reached. Once the highest memory address is reached, the address pointer
will automatically increment to the beginning (wrap-around) of the address space. Once the data from
address location 3FFFH has been read, the next output will be from address location 00000H.
Figure 6: High-Speed-Read Sequence
SCK
CE#
SO
SI
MODE 3
MODE 0
Note: X = Dummy Byte: 8 Clocks Input Dummy Cycle (V
MSB
0 1 2 3 4 5 6 7 8
0B
HIGH IMPEDANCE
MSB
ADD.
15 16
12
23
ADD.
-A
0
] and a dummy byte. CE# must remain active low for the
23 24
ADD.
IL
31 32
or V
IH
X
)
2 Mbit SPI Serial Flash
39 40
MSB
D
OUT
N
47 48
D
N+1
OUT
55 56
SST25VF020B
D
N+2
OUT
63 64
D
N+3
S71417-03-000
OUT
71 72
1417 HSRdSeq.0
Data Sheet
D
N+4
OUT
80
02/11

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