M66291GP#201 Renesas Electronics America, M66291GP#201 Datasheet - Page 69

• Manufacturer Part Number: M66291GP#201
• Description: IC USB CONTROLLER GEN-PUR 48LQFP
• Manufacturer: Renesas Electronics America

Specifications of M66291GP#201

• Package / Case: 48-LQFP
• Mounting Type: Surface Mount
• Current - Supply: 30mA
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -20°C ~ 85°C
• Interface: Serial
• Controller Type: USB 2.0 Controller
• Lead Free Status / RoHS Status: Not Compliant

M 6 6 2 9 1 G P / H P
2.33 Dn_FIFO Data Registers (n=0~1)
R e v 1 . 0 1
(1) D_FIFO(D_FIFO Data) Bits (b15~b0)
Note:The upper 8 bits (b15 to b8) become invalid in the 8-bit mode (using the Octl bits or *HWR/*BYTE pin).
b15
15~0
D0_FIFO Data Register (D0_FIFO_DATA)
D1_FIFO Data Register (D1_FIFO_DATA)
?
-
-
b
The receive data from the CPU side buffer is read or the transmit data to the CPU side buffer is written
through this register.
When set to OUT buffer (EPi_DIR bit = “0”), the receive data from the CPU side buffer is read through this
register.
When set to IN buffer (EPi_DIR bit = “1”), the transmit data to the CPU side buffer is written through this
register.
Make sure that the Dreq bit is equal to “0” before reading/writing these bits when the DMAEN bit is set to "0".
2 0 0 4 . 1 1 . 0 1
Note:
Note:
D_FIFO
D_FIFO Data
14
?
-
-
Refer to “3.2 FIFO Buffer” for CPU/SIE side.
When set to 16-bit mode, the M66291 is capable of recognizing the byte data written. Hence, it is possible to
transmit the odd byte data by setting “1” to the IVAL bit or asserting the TC pin after writing the byte data.
13
?
-
-
p a g e 6 9 o f 1 2 2
12
?
-
-
Bit name
11
?
-
-
10
?
-
-
9
?
-
-
<When set to OUT buffer>
Reads receive data
<When set to IN buffer>
Writes transmit data
Read
Write
8
?
-
-
D_FIFO
7
?
-
-
6
?
-
-
Function
5
?
-
-
4
?
-
-
3
?
-
-
2
?
-
-
<H/W reset : H'????>
<Address : H’4C>
<Address : H’54>
<USB bus reset : ->
<S/W reset : ->
1
?
-
-
R
b0
?
-
-
W