M66291GP#201 Renesas Electronics America, M66291GP#201 Datasheet - Page 86

• Manufacturer Part Number: M66291GP#201
• Description: IC USB CONTROLLER GEN-PUR 48LQFP
• Manufacturer: Renesas Electronics America

Specifications of M66291GP#201

• Package / Case: 48-LQFP
• Mounting Type: Surface Mount
• Current - Supply: 30mA
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -20°C ~ 85°C
• Interface: Serial
• Controller Type: USB 2.0 Controller
• Lead Free Status / RoHS Status: Not Compliant

M 6 6 2 9 1 G P / H P
3.2.4
R e v 1 . 0 1
IVAL Bit and EPB_RDY Bit
The IVAL bit is available per endpoint.
These IVAL bits can be specified by the CPU_EP bits and the DMA_EP bits, and the read/write is possible by
the IVAL bit of the CPU_FIFO Control Register and the IVAL bit of the Dn_FIFO Control Register.
The EPB_RDY bit can be set/cleared by the IVAL bit at each endpoint, irrespective of the aforesaid setting.
Similarly, the EPB_NRDY bit and EPB_EMP_OVR bit can be set/cleared regardless of the CPU_EP
bit/DMA_EP bit.
Make sure that the “1” setting to the EPB_RDY bit of the endpoint specified by the DMA_EP bit changes
according to the setting of the INTM bit.
2 0 0 4 . 1 1 . 0 1
Interrupt Status Register2 (EPB_NRDY)
Interrupt Status Register 3 (EPB_EMP_O VR)
Interrupt Status Register1 (EPB_RDY)
FIFO Status Register (EPB_ST S)
p a g e 8 6 o f 1 2 2
Endpoint 0
Endpoint 1
Endpoint 2
Endpoint 3
Endpoint i
IVAL
IVAL
IVAL
IVAL
IVAL
Figure 3.4 IVAL Bit and EPB_RDY Bit
Designates by DMA_EP bit
Designates by CPU_EP bit
Designates by DMA_EP bit
Fix
IVAL bit
IVAL bit
IVAL bit
IVAL bit
IVAL bit
CPU_FIFO Data Register
EP0_FIFO Data Register
D0_FIFO Data Register
D1_FIFO Data Register
Dn_FIFO Data Register
(Dn_FIFO Control Register)
(CPU_FIFO Control Register)
(D0_FIFO Control Register)
(EP0_FIFO Control Register)
(D1_FIFO Control Register)