CY7C66013-PVC Cypress Semiconductor Corp, CY7C66013-PVC Datasheet - Page 20

• Manufacturer Part Number: CY7C66013-PVC
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY7C66013-PVC

• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 48
• Lead Free Status / RoHS Status: Not Compliant

As an additional benefit, the interrupt polarity for each DAC pin is programmable with the DAC Port Interrupt Polarity register.
Writing a ‘0’ to a bit selects negative polarity (falling edge) that will cause an interrupt (if enabled) if a falling edge transition occurs
on the corresponding input pin. Writing a ‘1’ to a bit in this register selects positive polarity (rising edge) that will cause an interrupt
(if enabled) if a rising edge transition occurs on the corresponding input pin. All of the DAC Port Interrupt Polarity register bits are
cleared during a reset.
9.2
Each DAC I/O pin has an associated DAC Isink register to program the output sink current when the output is driven LOW. The
first Isink register (0x38) controls the current for DAC[0], the second (0x39) for DAC[1], and so on until the Isink register at 0x3F
controls the current to DAC[7]. Writing all ‘0’s to the Isink register will cause 1/5 of the max current to flow through the DAC I/O
pin. While writing all ‘1’s to the Isink register will provide the maximum current flow through the pin. The other 14 states of the
DAC sink current are evenly spaced between these two values.
10.0
The 12-bit timer provides two interrupts (128- s and 1.024-ms) and allows the firmware to directly time events that are up to 4
ms in duration. The lower 8 bits of the timer can be read directly by the firmware. Reading the lower 8 bits latches the upper 4
bits into a temporary register. When the firmware reads the upper 4 bits of the timer, it is accessing the count stored in the
temporary register. The effect of this logic is to ensure a stable 12-bit timer value can be read, even when the two reads are
separated in time.
10.1
10.2
Reserved
DAC[7]
DAC[7]
Timer
Bit 7
DAC Isink Registers
Timer (LSB)
Timer (MSB)
12-Bit Free-Running Timer
Reserved
DAC[6]
DAC[6]
Timer
Bit 6
Reserved
Figure 9-4. DAC Port Interrupt Polarity 0x32 (write only)
Figure 9-3. DAC Port Interrupt Enable 0x31 (write only)
Reserved
DAC[5]
DAC[5]
Figure 9-5. DAC Port Isink 0x38 to 0x3F (write only)
Timer
Bit 5
PRELIMINARY
Figure 10-1. Timer Register 0x24 (read only)
Figure 10-2. Timer Register 0x25 (read only)
Reserved
DAC[4]
DAC[4]
Timer
Bit 4
20
DAC[3]
DAC[3]
Isink[3]
Timer
Timer
Bit 11
Bit 3
DAC[2]
DAC[2]
Isink[2]
Timer
Timer
Bit 10
Bit 2
Isink Value
CY7C66011/12/13
CY7C66111/12/13
DAC[1]
DAC[1]
Isink[1]
Timer
Timer
Bit 1
Bit 9
DAC[0]
DAC[0]
Isink[0]
Timer
Timer
Bit 0
Bit 8