CY7C66013-PVC Cypress Semiconductor Corp, CY7C66013-PVC Datasheet - Page 6

• Manufacturer Part Number: CY7C66013-PVC
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY7C66013-PVC

• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 48
• Lead Free Status / RoHS Status: Not Compliant

2.0
The CY7C66011/12/13 and CY7C66111/12/13 are 8-bit microcontrollers (One Time Programmable or Windowed) with a built-in
12-Mbps USB hub that supports up to four downstream ports. The instruction set has been optimized specifically for USB
operations, although the microcontrollers can be used for a variety of non-USB embedded applications.
The CY7C66011/12/13 features 29 General-Purpose I/O (GPIO) pins to support USB and other applications. The I/O pins are
grouped into four ports (P0[7:0], P1[7:0], P2[7:0], P3[4:0]) where each port can be configured as inputs with internal pull-ups,
open drain outputs, or traditional CMOS outputs. Ports 0 to 2 are rated at 7 mA per pin (typical) sink current. Port 3 pins are rated
at 12 mA per pin (typical) sink current, which allows these pins to drive LEDs. Multiple GPIO pins can be connected together to
drive a single output for more drive current capacity. Additionally, each I/O pin can be used to generate a GPIO interrupt to the
microcontroller. All of the GPIO interrupts all share the same “GPIO” interrupt vector.
The CY7C66111/12/13 has 31 GPIO pins (P0[7:0], P1[7:0], P2[7:0], P3[6:0]). Additionally, the CY7C66111/12/13 features an
additional 8 I/O pins in the Digital to Analog Conversion (DAC) port (P4[7:0]). Every DAC pin includes an integrated 14-K pull-up
resistor. When a ‘1’ is written to a DAC I/O pin, the output current sink is disabled and the output pin is driven HIGH by the internal
pull-up resistor. When a ‘0’ is written to a DAC I/O pin, the internal pull-up is disabled and the output pin provides the programmed
amount of sink current. A DAC I/O pin can be used as an input with an internal pull-up by writing a ‘1’ to the pin.
The sink current for each DAC I/O pin can be individually programmed to one of sixteen values using dedicated Isink registers.
DAC bits P4[1:0] can be used as high current outputs with a programmable sink current range of 3.2 to 16 mA (typical). DAC bits
P4[7:2] have a programmable current sink range of 0.2 to 1.0 mA (typical). Multiple DAC pins can be connected together to drive
a single output that requires more sink current capacity. Each I/O pin can be used to generate a DAC interrupt to the microcon-
troller and the interrupt polarity for each DAC I/O pin is individually programmable.
The microcontroller uses an external 6 MHz crystal and an internal oscillator to provide a reference to an internal PLL-based
clock generator. This technology allows the customer application to use an inexpensive 6-MHz fundamental crystal that reduces
the clock-related noise emissions (EMI). A PLL clock generator provides the 6-, 12-, and 48-MHz clock signals for distribution
within the microcontroller.
The CY7C66011/12/13 and CY7C66111/12/13 are offered with three EPROM options. The CY7C66011 and CY7C66111 have
4 KB of EPROM. The CY7C66012 and CY7C66112 have 6 KB of EPROM. The CY7C66013 and CY7C66113 have 8 KB of
EPROM.
These parts include power-on reset logic, a watchdog timer, and a 12-bit free-running timer. The power-on reset (POR) logic
detects when power is applied to the device, resets the logic to a known state, and begins executing instructions at EPROM
address 0x0000. The watchdog timer is used to ensure the microcontroller will recover after a period of inactivity. The firmware
may become inactive for a variety of reasons, including errors in the code or a hardware failure such as waiting for an interrupt
that never occurs.
The microcontroller can communicate with external electronics through the GPIO pins. An I
serial link with an external device. There is also a Hardware Assisted Parallel Interface which can be used to transfer data to an
external device.
The free-running 12-bit timer clocked at 1 MHz provides two interrupt sources, 128- s and 1.024-ms. The timer can be used to
measure the duration of an event under firmware control by reading the timer twice: once at the start of the event, and once after
the event is complete. The difference between the two readings indicates the duration of the event measured in microseconds.
The upper four bits of the timer are latched into an internal register when the firmware reads the lower eight bits. A read from the
upper four bits actually reads data from the internal register, instead of the timer. This feature eliminates the need for firmware to
attempt to compensate if the upper four bits happened to increment right after the lower eight bits are read.
The microcontroller supports 11 maskable interrupts in the vectored interrupt controller. Interrupt sources include the 128- s (bit
6) and 1.024-ms (bit 9) outputs from the free-running timer, five USB endpoints, the USB hub, the DAC port, the GPIO ports, and
the I
USB endpoints interrupt after the USB host has written data to the endpoint FIFO or after the USB controller sends a packet to
the USB host. The DAC ports have an additional level of masking that allows the user to select which DAC inputs can cause a
DAC interrupt. The GPIO ports also have a level of masking to select which GPIO inputs can cause a GPIO interrupt. For additional
flexibility, the input transition polarity that causes an interrupt is programmable for each pin of the DAC port. Input transition polarity
can be programmed for each GPIO port as part of the port configuration. The interrupt polarity can be either rising edge (‘0’ to
‘1’) or falling edge (‘1’ to ‘0’).
The CY7C66011/12/13 and CY7C66111/12/13 include an integrated USB serial interface engine (SIE) that supports the integrat-
ed peripherals and the hub controller function. The hardware supports up to two USB device addresses with one device address
for the hub (two endpoints) and a device address for a compound device (three endpoints). The SIE allows the USB host to
communicate with the hub and functions integrated into the microcontroller. The part includes a 1:4 hub repeater with one
upstream port and four downstream ports. The USB hub includes power management control of the downstream ports using
GPIO pins assigned by the user firmware. The user has the option of ganging the downstream ports together with a single pair
of power management pins, or providing power management for each port with four pairs of power management pins.
2
C master mode interface. The timer bits cause an interrupt (if enabled) when the bit toggles from LOW ‘0’ to HIGH ‘1’. The
Functional Overview
PRELIMINARY
6
2
C interface accommodates a 100-kHz
CY7C66011/12/13
CY7C66111/12/13