CY7C66013-PVC Cypress Semiconductor Corp, CY7C66013-PVC Datasheet - Page 25

• Manufacturer Part Number: CY7C66013-PVC
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY7C66013-PVC

• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 48
• Lead Free Status / RoHS Status: Not Compliant

Table 15-1. Interrupt Vector Assignments
15.2
Interrupt latency can be calculated from the following equation:
Interrupt latency =
For example, if a 5 clock cycle instruction such as JC is being executed when an interrupt occurs, the first instruction of the
Interrupt Service Routine will execute a min. of 16 clocks (1+10+5) or a max. of 20 clocks (5+10+5) after the interrupt is issued.
Remember that the interrupt latches are sampled at the rising edge of the last clock cycle in the current instruction.
15.3
The USB Controller recognizes a USB Reset when a Single Ended Zero (SE0) condition persists for 12–16 s (the Reset may
be recognized for an SE0 as short as 12 s, but will always be recognized for an SE0 longer than 16 s). SE0 is defined as the
condition in which both the D+ line and the D– line are LOW. Bit 5 of the Status and Control Register will be set to record thi s
event. If the USB reset happens while the device is suspended (such as after a POR), the suspend condition will be cleared and
the clock oscillator will be restarted.
15.4
There are two timer interrupts: the 128- s interrupt and the 1.024-ms interrupt. The user should disable both timer interrupts
before going into the suspend mode to avoid possible conflicts between servicing the timer interrupts first or the suspend request
first.
15.5
There are five USB endpoint interrupts, one per endpoint. A USB endpoint interrupt is generated after the USB host writes to a
USB endpoint FIFO or after the USB controller sends a packet to the USB host.
15.6
A USB hub interrupt is generated by the hardware after a connect/disconnect change, babble, or a resume event is detected by
the USB repeater hardware. The babble and resume events are additionally gated by the corresponding bits of the Hub Port
Enable Register (0x49). The connect/disconnect event on a port will not generate an interrupt if the SIE does not drive the port,
i.e., the port is being forced.
15.7
Each DAC I/O pin can generate an interrupt, if enabled. The interrupt polarity for each DAC I/O pin is programmable. A positive
polarity is a rising edge input while a negative polarity is a falling edge input. All of the DAC pins share a single interrupt vector,
which means the firmware will need to read the DAC port to determine which pin or pins caused an interrupt.
Interrupt Vector Number
Interrupt Latency
USB Bus Reset Interrupt
Timer Interrupt
USB Endpoint Interrupts
USB Hub Interrupt
DAC Interrupt
Not Applicable
10
11
12
1
2
3
4
5
6
7
8
9
(Number of clock cycles remaining in the current instruction) + (10 clock cycles for the CALL instruction) +
(5 clock cycles for the JMP instruction)
PRELIMINARY
ROM Address
0x000A
0x000C
0x000E
0x0000
0x0002
0x0004
0x0006
0x0008
0x0010
0x0012
0x0014
0x0016
0x0018
25
Execution after Reset begins here
USB Bus Reset interrupt
128- s timer interrupt
1.024-ms timer interrupt
USB Address A Endpoint 0 interrupt
USB Address A Endpoint 1 interrupt
USB Address A Endpoint 2 interrupt
USB Address B Endpoint 0 interrupt
USB Address B Endpoint 1 interrupt
USB Hub interrupt
DAC interrupt
GPIO interrupt
I
2
C interrupt
Function
CY7C66011/12/13
CY7C66111/12/13