ISP1161A1BD,118 STEricsson, ISP1161A1BD,118 Datasheet - Page 75

• Manufacturer Part Number: ISP1161A1BD,118
• Manufacturer: STEricsson

Specifications of ISP1161A1BD,118

• Operating Temperature (max): 85C
• Operating Temperature (min): -40C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Supplier Unconfirmed

Table 62.
Table 64.
ISP1161A1_4
Product data sheet
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
HcITLBufferPort register: bit allocation
HcATLBufferPort register: bit allocation
10.6.6 HcITLBufferPort register (R/W: 40H/C0H)
10.6.7 HcATLBufferPort register (R/W: 41H/C1H)
15
15
7
This is the ITL buffer RAM read/write port. The bits 15 to 8 contain the data byte that
comes from the ITL buffer RAM’s even address. The bits 7 to 0 contain the data byte that
comes from the ITL buffer RAM’s odd address.
Code (Hex): 40 — read
Code (Hex): C0 — write
Table 63.
The HCD must set the byte count into the HcTransferCounter register and check the
HcBufferStatus register before reading from or writing to the buffer. The HCD must write
the command (40H to read, C0H to write) once only, and then read or write both bytes of
the data word. After every read/write, the pointer of ITL buffer RAM will be automatically
increased by two to point to the next data word until it reaches the value of the
HcTransferCounter register; otherwise, an internal EOT signal is not generated to set bit 2
(AllEOTInterrupt) of the Hc PInterrupt register and update the HcBufferStatus register.
The HCD must take care of the fact that the internal buffer RAM is organized in bytes. The
HCD must write the byte count into the HcTransferCounter register, but the HCD reads or
writes the buffer RAM by 16 bits (by 1 data word).
This is the ATL buffer RAM read/write port. Bits 15 to 8 contain the data byte that comes
from the Acknowledged Transfer List (ATL) buffer RAM’s odd address. Bits 7 to 0 contain
the data byte that comes from the ATL buffer RAM’s even address.
Code (Hex): 41 — read
Code (Hex): C1 — write
Bit
15 to 0
14
14
6
Symbol
DataWord[15:0]
HcITLBufferPort register: bit description
13
13
5
Rev. 04 — 29 January 2009
Description
read/write ITL buffer RAM’s two data bytes.
12
12
DataWord[15:8]
DataWord[15:8]
4
DataWord[7:0]
R/W
R/W
R/W
00H
00H
00H
USB single-chip host and device controller
11
11
3
10
10
2
ISP1161A1
© ST-NXP Wireless 2009. All rights reserved.
9
1
9
74 of 140
8
0
8