ISP1161A1BD,118 STEricsson, ISP1161A1BD,118 Datasheet - Page 89

• Manufacturer Part Number: ISP1161A1BD,118
• Manufacturer: STEricsson

Specifications of ISP1161A1BD,118

• Operating Temperature (max): 85C
• Operating Temperature (min): -40C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Supplier Unconfirmed

ISP1161A1_4
Product data sheet
12.4.1.2 DcDMACounter register
12.4.1.3 Short packet
12.4.2 Isochronous endpoints
An EOT from the DcDMACounter register is enabled by setting bit CNTREN in the
DcDMAConfiguration register. The ISP1161A1 has a 16-bit DcDMACounter register,
which specifies the number of bytes to be transferred. When DMA is enabled
(DMAEN = 1), the internal DMA counter is loaded with the value from the DcDMACounter
register. When the internal counter completes the transfer as programmed in the
DcDMACounter, an EOT condition is generated and the DMA operation stops.
Normally, the transfer byte count must be set via a control endpoint before any DMA
transfer takes place. When a short packet has been enabled as EOT indicator
(SHORTP = 1), the transfer size is determined by the presence of a short packet in the
data. This mechanism permits the use of a fully autonomous data transfer protocol.
When reading from an OUT endpoint, reception of a short packet at an OUT token will
stop the DMA operation after transferring the data bytes of this packet.
Table 73.
[1]
A DMA transfer to/from an isochronous endpoint can be terminated by any of the following
conditions (bit names refer to the DcDMAConfiguration register, see
Table 74.
EOT condition
EOT input
DcDMACounter register
Short packet
Bit DMAEN in
DcDMAConfiguration register
EOT condition
EOT input active
DMA Counter register zero
End-Of-Packet
•
•
•
•
The DMA transfer stops. However, no interrupt is generated.
An external End-Of-Transfer signal occurs on input EOT
The DMA transfer completes as programmed in the DcDMACounter register
(CNTREN = 1)
An End-Of-Packet (EOP) signal is detected
DMA operation is disabled by clearing bit DMAEN.
Summary of EOT conditions for a bulk endpoint
Recommended EOT usage for isochronous endpoints
Rev. 04 — 29 January 2009
OUT endpoint
EOT is active
transfer completes as
programmed in the
DcDMACounter register
short packet is received and
transferred
DMAEN = 0
OUT endpoint
do not use
do not use
preferred
[1]
USB single-chip host and device controller
IN endpoint
EOT is active
transfer completes as
programmed in the
DcDMACounter register
counter reaches zero in the
middle of the buffer
DMAEN = 0
IN endpoint
preferred
preferred
do not use
ISP1161A1
© ST-NXP Wireless 2009. All rights reserved.
Table
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