LSI53C040-160QFP LSI, LSI53C040-160QFP Datasheet - Page 41

• Manufacturer Part Number: LSI53C040-160QFP
• Manufacturer: LSI

Specifications of LSI53C040-160QFP

• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Supplier Unconfirmed

2.7.4 Download Port Select
2.8 Resets
configuration download, based on the values of the A[10:8] signal pins.
As indicated in the table, the serial ROM chip address mapping is
equivalent to the power-on value of signal pins A[10:8].
Table 2.4
The A11 pin selects which of the Two-Wire Serial interfaces will perform
the initial download. The default for the download is Two-Wire Serial
port 0. A pull-up resistor on the A11 pin starts the download from
Two-Wire Serial port 1, after a reset or at power-on.
The LSI53C040 can be reset in three different ways: power-on reset,
asserting the reset pin, and an internal chip reset forced by expiration of
the watchdog timer. A power-on reset initializes all chip registers to their
default values and returns the Two-Wire Serial port and the SCSI or
SFF-8067 interfaces to idle states. A power-on reset is caused when
power to the chip has been turned off and is turned back on. Manually
asserting the RESET/ pin triggers a soft reset. This can be done to
initiate a second configuration ROM download for the purpose of adding
more firmware or changing default register values before the chip begins
normal operation.
Resets
Serial ROM Chip
1010 000
1010 001
1010 010
1010 011
1010 100
1010 101
1010 110
1010 111
Address
Serial ROM Chip Addresses
AD10 Pull-up
Pull-up
Pull-up
Pull-up
Pull-up
None
None
None
None
AD9 Pull-up
Pull-up
Pull-up
Pull-up
Pull-up
None
None
None
None
AD8 Pull-up
Pull-up
Pull-up
Pull-up
Pull-up
None
None
None
None
2-23