GS816218BD-150I GSI TECHNOLOGY, GS816218BD-150I Datasheet - Page 8

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GS816218BD-150I

Manufacturer Part Number
GS816218BD-150I
Description
Manufacturer
GSI TECHNOLOGY
Datasheet

Specifications of GS816218BD-150I

Density
18Mb
Access Time (max)
7.5ns
Sync/async
Synchronous
Architecture
SDR
Clock Freq (max)
133.3MHz
Operating Supply Voltage (typ)
2.5/3.3V
Address Bus
20b
Package Type
FBGA
Operating Temp Range
-40C to 85C
Number Of Ports
2
Supply Current
185mA
Operating Supply Voltage (min)
2.3/3V
Operating Supply Voltage (max)
2.7/3.6V
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
165
Word Size
18b
Number Of Words
1M
Lead Free Status / RoHS Status
Not Compliant
Mode Pin Functions
Note:
There are pull-up devices on the ZQ, SCD, and FT pins and a pull-down device on the ZZ pin, so those input pins can be unconnected and the
chip will operate in the default states as specified in the above tables.
Burst Counter Sequences
Linear Burst Sequence
Note:
The burst counter wraps to initial state on the 5th clock.
Rev: 1.07 9/2008
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
2nd address
3rd address
1st address
4th address
FLXDrive Output Impedance Control
Single/Dual Cycle Deselect Control
Output Register Control
Power Down Control
Burst Order Control
Mode Name
A[1:0] A[1:0] A[1:0] A[1:0]
00
01
10
11
01
10
00
11
10
11
00
01
00
01
10
11
Pin Name
8/37
SCD
LBO
ZQ
ZZ
FT
Interleaved Burst Sequence
Note:
The burst counter wraps to initial state on the 5th clock.
2nd address
3rd address
4th address
1st address
H or NC
H or NC
H or NC
L or NC
State
H
H
L
L
L
L
A[1:0] A[1:0] A[1:0] A[1:0]
00
01
10
11
High Drive (Low Impedance)
Low Drive (High Impedance)
Single Cycle Deselect
Dual Cycle Deselect
01
00
11
10
Standby, I
Interleaved Burst
Flow Through
Linear Burst
Function
Pipeline
Active
GS816218/36B(B/D)
10
00
01
11
DD
© 2004, GSI Technology
= I
SB
11
10
01
00
BPR 1999.05.18

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