W234X Cypress Semiconductor Corp, W234X Datasheet - Page 10

CLOCK GEN DIR RAMBS DUAL 28TSSOP

W234X

Manufacturer Part Number
W234X
Description
CLOCK GEN DIR RAMBS DUAL 28TSSOP
Manufacturer
Cypress Semiconductor Corp
Type
Direct RAMbus Clock Generatorr
Datasheet

Specifications of W234X

Input
CMOS
Output
CMOS
Frequency - Max
400MHz
Voltage - Supply
3.135 V ~ 3.465 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
28-TSSOP
Frequency-max
400MHz
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
428-1398

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
W234X
Manufacturer:
ICW
Quantity:
20 000
Table 12. Operating Conditions
Notes:
Document #: 38-07232 Rev. *B
2.
3.
4.
5.
6.
V
T
t
t
DC
FM
PM
t
t
DC
t
C
C
V
V
V
V
V
V
V
V
CYCLE,IN
J,IN
CYCLE,PD
ERR,INIT
I,SR
A
C
DD
IL
IH
IL,R
IH,R
IL,PD
IH,PD
DDIR
DDIPD
Parameter
IN,PD
IN,CMOS
IN,PD
IN
IN
IN,PD
Multiple Supplies: The voltage on any input or I/O pin cannot exceed the power pin during power-up. Power supply sequencing is NOT required.
Refclk jitter measured at V
If input modulation is used: input modulation is allowed but not required.
The amount of allowed spreading for any non-triangular modulation is determined by the induced downstream tracking skew, which cannot exceed the skew
generated by the specified 0.6% triangular modulation. Typically, the amount of allowed non-triangular modulation is about 0.5%.
Capacitance measured at Freq = 1 MHz, DC bias = 0.9V and V
IN
[4]
Supply Voltage
Ambient Operating Temperature
Refclk Input Cycle Time
Input Cycle-to-Cycle Jitter
Input Duty Cycle over 10,000 Cycles
Input Frequency of Modulation
Modulation Index for Triangular Modulation
Modulation Index for Non-Triangular Modulation
Phase Detector Input Cycle Time at PCLKM & SYNCLKN
Initial Phase error at Phase Detector Inputs
Phase Detector Input Duty Cycle over 10,000 Cycles
Input Slew Rate (measured at 20%-80% of input voltage) for
PCLKM, SYNCLKN, and REFCLK
Input Capacitance at PCLKM, SYNCLKN, and REFCLK
Input Capacitance matching at PCLKM and SYNCLKN
Input Capacitance at CMOS pins (excluding PCLKM, SYNCLKN,
and REFCLK)
Input (CMOS) Signal Low Voltage
Input (CMOS) Signal High Voltage
Refclk Input Low Voltage
Refclk Input High Voltage
Input Signal Low Voltage for PD Inputs and STOP#
Input Signal High Voltage for PD Inputs and STOP#
Input Supply Reference for REFCLK
Input Supply Reference for PD Inputs
DDIR
(nom)/2.
[6]
[2]
[3]
Description
AC
< 100 mV.
[6]
[6]
3.135
1.235
1.235
Min.
–0.5
0.7
0.7
0.7
10
40
30
30
25
0
1
-
3.465
3.465
2.625
Max.
0.5
250
100
0.6
0.5
0.5
0.3
0.3
0.3
70
40
60
33
75
10
4
7
-
[5]
Page 10 of 14
t
t
%t
CYCLE,PD
CYCLE,PD
V
V
V
V
VDD
VDD
W234
Unit
V/ns
DDIPD
DDIPD
kHz
CYCLE
DDIR
DDIR
pF
pF
pF
°C
ns
ps
ns
%
%
V
V
V

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