IC SYNTHESIZER VCO 24-LFCSP

ADF4360-8BCPZ

Manufacturer Part NumberADF4360-8BCPZ
DescriptionIC SYNTHESIZER VCO 24-LFCSP
ManufacturerAnalog Devices Inc
TypeFanout Distribution, Integer N Synthesizer (RF)
ADF4360-8BCPZ datasheet
 


Specifications of ADF4360-8BCPZ

PllYesInputCMOS
OutputClockNumber Of Circuits1
Ratio - Input:output1:2Differential - Input:outputNo/No
Frequency - Max400MHzDivider/multiplierYes/No
Voltage - Supply3 V ~ 3.6 VOperating Temperature-40°C ~ 85°C
Mounting TypeSurface MountPackage / Case24-LFCSP
Frequency-max400MHzPll TypeFrequency Synthesis
Frequency400MHzSupply Current5mA
Supply Voltage Range3V To 3.6VDigital Ic Case StyleLFCSP
No. Of Pins24Operating Temperature Range-40°C To +85°C
Lead Free Status / RoHS StatusLead free / RoHS CompliantFor Use WithEVAL-ADF4360-8EBZ1 - BOARD EVALUATION FOR ADF4360-8
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FEATURES
Output frequency range: 65 MHz to 400 MHz
3.0 V to 3.6 V power supply
1.8 V logic compatibility
Integer-N synthesizer
Programmable output power level
3-wire serial interface
Digital lock detect
Hardware and software power-down mode
APPLICATIONS
System clock generation
Test equipment
Wireless LANs
CATV equipment
ADF4360-8
REF
IN
CLK
DATA
DATA REGISTER
LE
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
Integrated Synthesizer and VCO
GENERAL DESCRIPTION
The ADF4360-8 is an integrated integer-N synthesizer and
voltage-controlled oscillator (VCO). The ADF4360-8 center
frequency is set by external inductors. This allows a frequency
range of between 65 MHz to 400 MHz.
Control of all the on-chip registers is through a simple 3-wire
interface. The device operates with a power supply ranging from
3.0 V to 3.6 V and can be powered down when not in use.
FUNCTIONAL BLOCK DIAGRAM
AV
DV
R
DD
DD
SET
14-BIT R
COUNTER
LOCK
DETECT
24-BIT
24-BIT
FUNCTION
LATCH
PHASE
COMPARATOR
13-BIT B
COUNTER
N = B
AGND
DGND
CPGND
Figure 1.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.326.8703
ADF4360-8
CE
MUXOUT
MULTIPLEXER
MUTE
CHARGE
CP
PUMP
V
VCO
V
TUNE
L1
L2
C
C
C
N
RF
OUT
VCO
OUTPUT
CORE
STAGE
RF
OUT
www.analog.com
© 2005 Analog Devices, Inc. All rights reserved.
A
B

ADF4360-8BCPZ Summary of contents

  • Page 1

    ... Analog Devices. Trademarks and registered trademarks are the property of their respective owners. Integrated Synthesizer and VCO GENERAL DESCRIPTION The ADF4360 integrated integer-N synthesizer and voltage-controlled oscillator (VCO). The ADF4360-8 center frequency is set by external inductors. This allows a frequency range of between 65 MHz to 400 MHz. ...

  • Page 2

    ... ADF4360-8 TABLE OF CONTENTS Specifications..................................................................................... 3 Timing Characteristics ................................................................ 5 Absolute Maximum Ratings............................................................ 6 Transistor Count........................................................................... 6 ESD Caution.................................................................................. 6 Pin Configuration and Function Descriptions............................. 7 Typical Performance Characteristics ............................................. 8 Circuit Description......................................................................... 10 Reference Input Section............................................................. 10 N Counter.................................................................................... 10 R Counter .................................................................................... 10 PFD and Charge Pump.............................................................. 10 MUXOUT and Lock Detect...................................................... 10 Input Shift Register..................................................................... 11 VCO ...

  • Page 3

    ... Ratio MAX MIN MHz/V typ L1 270 nH. See the Choosing the Correct Inductance Value section for other sensitivity values. µs typ To within final frequency MHz/V typ Hz typ Into 2.00 VSWR load dBc typ Rev Page ≤ 2.5 V ≤ 2.5 V ADF4360-8 ...

  • Page 4

    ... PFD MHz MHz 120; loop B/W = 100 kHz. REFIN PFD 14 The spurious signals are measured with the EVAL-ADF4360-xEB1 Evaluation Board and the HP 8562E Spectrum Analyzer. The Spectrum Analyzer provides the REF for the synthesizer MHz @ 0 dBm. REFOUT B Version Unit Conditions/Comments −21 dBc typ − ...

  • Page 5

    ... DB22 DB2 (CONTROL BIT C2) Figure 2. Timing Diagram Rev Page ADF4360 unless otherwise noted. A MIN MAX Test Conditions/Comments LE setup time DATA to CLOCK setup time DATA to CLOCK hold time CLOCK high duration CLOCK low duration CLOCK to LE setup time LE pulse width ...

  • Page 6

    ... ADF4360-8 ABSOLUTE MAXIMUM RATINGS T = 25°C, unless otherwise noted. A Table 3. Parameter GND GND VCO VCO DD Digital I/O Voltage to GND Analog I/O Voltage to GND REF to GND IN Operating Temperature Range Storage Temperature Range Maximum Junction Temperature CSP θ Thermal Impedance JA Paddle Soldered Paddle Not Soldered ...

  • Page 7

    ... TUNE output voltage external inductor to AGND should be connected to this pin to set the ADF4360-8 output frequency. L1 and L2 need to be the same value. A 470 Ω resistor should be added in parallel to AGND external inductor to AGND should be connected to this pin to set the ADF4360-8 output frequency. L1 and L2 need to be the same value. A 470 Ω ...

  • Page 8

    ... ADF4360-8 TYPICAL PERFORMANCE CHARACTERISTICS –40 –50 –60 –70 –80 –90 –100 –110 –120 –130 –140 –150 100 1k 10k 100k FREQUENCY OFFSET (Hz) Figure 4. Open-Loop VCO Phase Noise, L1 560 nH –70 –75 –80 –85 –90 –95 –100 –105 –110 –115 –120 –125 –130 –135 – ...

  • Page 9

    ... Figure 14. Close-In Phase Noise at 400 MHz (1 MHz Channel Spacing) –10 –20 –30 –40 –50 –60 –70 –80 –90 1M 10M –1.1MHz Rev Page ADF4360-8 100 1k 10k 100k 1M FREQUENCY OFFSET (Hz 3.3V VCO REFERENCE I = 2.5mA CP LEVEL = 0dBm PFD FREQUENCY = 1MHz LOOP BANDWIDTH = 100kHz RES ...

  • Page 10

    ... CP OUTPUT Figure 17. PFD Simplified Schematic and Timing (In Lock) MUXOUT AND LOCK DETECT The output multiplexer on the ADF4360 family allows the user to access various internal points on the chip. The state of MUXOUT is controlled by M3, M2, and M1 in the function latch. The full truth table is shown in Table 7. Figure 18 shows the MUXOUT section in block diagram form ...

  • Page 11

    ... Test Modes Latch VCO The VCO core in the ADF4360 family uses eight overlapping bands, as shown in Figure 19, to allow a wide frequency range to be covered without a large VCO sensitivity (K poor phase noise and spurious performance. The correct band is chosen automatically by the band select logic at power-up or whenever the N counter latch is updated ...

  • Page 12

    ... If the outputs are used individually, the optimum output stage consists of a shunt inductor to V Another feature of the ADF4360 family is that the supply current to the RF output stage is shut down until the part achieves lock, as measured by the digital lock detect circuitry. This is enabled by the Mute-Till-Lock Detect (MTLD) bit in the control latch ...

  • Page 13

    ... LATCH STRUCTURE Table 6 shows the three on-chip latches for the ADF4360 family. The two LSBs decide which latch is programmed. Table 6. Latch Structure CURRENT SETTING 2 DB23 DB22 DB21 DB20 DB19 DB18 DB17 DB16 DB15 DB14 DB13 DB12 DB11 DB10 RSV RSV PD2 ...

  • Page 14

    ... ADF4360-8 Table 7. Control Latch CURRENT SETTING 2 DB23 DB22 DB21 DB20 DB19 DB18 DB17 DB16 DB15 DB14 DB13 DB12 DB11 DB10 RSV RSV PD2 PD1 CPI6 CPI5 CPI4 CPI6 CPI5 CPI3 CPI2 PL2 PIN PD2 PD1 THESE BITS ARE NOT USED BY THE DEVICE AND ARE DON'T CARE BITS ...

  • Page 15

    ... THESE BITS ARE NOT USED BY THE DEVICE AND ARE DON'T CARE BITS PRESCALER VALUE SET IN THE CONTROL LATCH. B MUST BE GREATER THAN OR EQUAL TO A. FOR CONTINUOUSLY ADJACENT VALUES OF (N × THE OUTPUT, N REF ADF4360-8 CONTROL BITS DB2 DB1 DB0 RSV C2 ( – ...

  • Page 16

    ... ADF4360-8 Table 9. R Counter Latch BAND BACKLASH SELECT CLOCK DB23 DB22 DB21 DB20 DB19 DB18 DB17 DB16 DB15 DB14 DB13 DB12 DB11 DB10 RSV RSV BSC2 BSC1 TMB LDP ABP2 TEST MODE BIT SHOULD BE SET TO 0 FOR NORMAL THESE BITS ARE NOT OPERATION ...

  • Page 17

    ... VCO may not oscillate at the desired frequency, which does not allow the band select logic to choose the correct frequency band, and the ADF4360-8 may not achieve lock. If the recom- mended interval is inserted, and the N counter latch is pro- grammed, the band select logic can choose the correct fre- quency band, and the part locks to the correct frequency ...

  • Page 18

    ... ADF4360-8 Hardware Power-Up/Power-Down If the part is powered down via the hardware (using the CE pin) and powered up again without any change to the N counter register during power-down, the part locks at the correct fre- quency, because the part is already in the correct frequency band. The lock time depends on the value of capacitance on the C pin, which is < ...

  • Page 19

    ... The on-chip multiplexer is controlled by M3, M2, and M1. See the truth table in Table 7 . Counter Reset DB4 is the counter reset bit for the ADF4360 family. When this is 1, the R counter and the A, B counters are reset. For normal operation, this bit should be 0. Core Power Level PC1 and PC2 set the power level in the VCO core ...

  • Page 20

    ... Overall Divide Range The overall VCO feedback divide range is defined Gain DB21 of the N counter latch in the ADF4360 family is the charge pump gain bit. When it is programmed to 1, Current Setting 2 is used. When programmed to 0, Current Setting 1 is used. This bit can also be programmed through DB10 of the control latch ...

  • Page 21

    ... FIXED FREQUENCY LO Figure 24 shows the ADF4360-8 used as a fixed frequency LO at 200 MHz. The low-pass filter was designed using ADIsimPLL for a channel spacing of 2 MHz and an open-loop bandwidth of 100 kHz ...

  • Page 22

    ... The MicroConverter is set up for SPI master mode with CPHA = 0. To initiate the operation, the I/O port driving LE is brought low. Each latch of the ADF4360 family needs a 24-bit word, which is accomplished by writing three 8-bit bytes from the MicroConverter to the device. After the third byte has been written, the LE input should be brought high to complete the transfer ...

  • Page 23

    ... OUTPUT MATCHING There are a number of ways to match the output of the ADF4360-8 for optimum operation; the most basic is to use a 50 Ω resistor bypass capacitor of 100 pF is VCO connected in series, as shown in Figure 27. Because the resistor is not frequency dependent, this provides a good broadband match. The output power in the circuit below typically gives − ...

  • Page 24

    ... ADF4360-8BCPRL7 −40°C to +85°C ADF4360-8BCPZ 1 −40°C to +85°C 1 ADF4360-8BCPZRL −40°C to +85°C 1 ADF4360-8BCPZRL7 −40°C to +85°C EVAL-ADF4360-8EB1 Pb-free part. Purchase of licensed components of Analog Devices or one of its sublicensed Associated Companies conveys a license for the purchaser under the Philips I 2 ...