HI7188IN Intersil, HI7188IN Datasheet - Page 16

• Manufacturer Part Number: HI7188IN
• Description: CONV A/D 16BIT 8:1 MUX 44-MQFP
• Manufacturer: Intersil

Specifications of HI7188IN

• Number Of Bits: 16
• Sampling Rate (per Second): 240
• Data Interface: QSPI™, Serial, SPI™
• Number Of Converters: 1
• Power Dissipation (max): 50mW
• Voltage Supply Source: Analog and Digital, Dual ±
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 44-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

System Negative Full Scale Calibration
The system negative full scale calibration mode is a process
that allows the user to lump negative gain errors of external
circuitry and the internal gain errors of the HI7188 together to
calculate the negative transfer function of the system. This
mode will convert the external differential signal applied to the
VIN inputs and then store that value in the system negative full
scale calibration RAM for that physical channel. To invoke the
system negative full scale calibration the user applies the
“negative full scale voltage”, which must be equal to Vref, to the
physical channel requiring calibration, then writes the related
CCR byte indicating negative full scale calibration is required
(see note below). The next time this logical channel is
converted, the microsequencer performs calibration and
updates the related system negative full scale calibration RAM.
Next the internal microsequencer places that logical channel
back into the conversion mode and updates the CCR byte.
TEMPORARY NOTE: In bipolar mode, the user MUST perform
negative full scale calibration with the exact differential voltage
applied to the Vref pins, otherwise large errors will occur at the zero
crossing point. During normal conversions, the error occurs when the
input is at the offset calibration point. At this point, plus or minus 1/2
LSB, the output code will be either the true half scale reading of
7FFF/8000 (offset binary coding) or negative full scale 0000.
Offset and Gain Adjust Limits
Whenever a calibration mode is used, there are limits to the
amount of offset and gain which can be adjusted. For both
bipolar and unipolar modes the minimum and maximum
input spans are 0.2 x V
respectively. In the unipolar mode the offset plus the span
cannot exceed the 1.2 x V
at its minimum value of 0.2 x V
less than 1 x V
equidistant around the voltage used for the zero scale point.
For this mode the offset plus half the span cannot exceed
1.2 x V
the offset can not be greater than 2 x V
Range Detection
In addition to the calibration process, the converter detects over
range above positive full scale and under range below minus
full scale conditions. Over or under range detection affects the
output data coding as described in the Data Coding section.
Over range detection is identical for both bipolar and
unipolar operation. Over range is detected by comparing the
offset corrected filter output to the positive gain coefficient. If
the current offset corrected filter value is greater than the
positive gain coefficient, an over range condition is detected.
In unipolar mode, under range is detected by sampling the
sign bit of the offset calibrated data. If the sign bit is logic 1,
signifying a negative voltage, an under range condition exists.
In bipolar mode, under range is detected by comparing the
offset corrected filter output to the negative gain coefficient.
If the current offset corrected filter value is less than the
REF
/GAIN. If the span is at 0.2 x V
REF
/GAIN. In bipolar mode the span is
REF
REF
/GAIN and 1.2 x V
16
/GAIN limit. So, if the span is
REF
/GAIN, the offset must be
REF
REF
/GAIN.
REF
/GAIN then
/GAIN
HI7188
negative gain coefficient, an under range condition is
detected.
Data Coding
The calibrated data can be obtained in one of various numerical
codes depending on the bipolar/unipolar mode bit and the two’s
complement coding bit. In bipolar mode, if the two’s
complement bit is high, the output is two’s complement. In
bipolar mode, offset binary coding is used when the two’s
complement coding bit is low. In unipolar mode, only binary
coding is available and the two’s complement coding bit is a
don’t care.
The output coding for the HI7188 is shown in Tables 4 and 5.
V
offset calibration. V
scale input during system positive full scale calibration.
V
system negative full scale calibration.
When the range detection logic determines an over range,
the converter output will clamp at the >(V
output as described in Tables 4 and 5. When the range
detection logic determines an under range, the converter
output will clamp at the <(V
described in Table 4 or the <(V
described in Table 5.
Data RAM
The Data RAM block is comprised of two 8 x 16 memory
elements which store conversion results after calibration and
data coding. Two RAMs are required to allow a one channel
scan buffer per logical channel. The user can only READ from
the data RAM. For illustration, these elements are labeled
>(V
V
V
V
<(V
>(V
V
V
V
<(V
ZS
NFS
PFS
ZS
NFS
PFS
PFS
ZS
INPUT VOLTAGE
TABLE 5. UNIPOLAR MODE DATA OUTPUT CODES (HEX)
PFS
NFS
PFS
ZS
represents the applied zero scale input during system
- 0.5 LSB
+ .5 LSB
/2 - 0.5 LSB
- 1.5 LSB
- 1.5 LSB
+ 0.5 LSB
represents the applied negative full scale input during
TABLE 4. BIPOLAR MODE OUTPUT CODES (HEX)
+ 0.5 LSB)
- 1.5 LSB)
- 1.5 LSB)
+ 0.5 LSB)
INPUT VOLTAGE
PFS
represents the applied positive full
COMPLEMENT
7FFF/7FFE
0000/FFFF
8001/8000
TWO’S
NFS
CODE
7FFF
8000
ZS
+ 0.5 LSB) output
+ 0.5 LSB) output
BINARY CODE
FFFF/FFFE
8000/7FFF
0001/0000
PFS
BINARY CODE
FFFF
0000
FFFF/FFFE
8000/7FFF
0001/0000
OFFSET
- 1.5 LSB)
FFFF
0000