PIC10F220-E/OT Microchip Technology, PIC10F220-E/OT Datasheet - Page 16

384B Flash, 16B RAM, 4 I/O, 8bit ADC 6 SOT-23 BAG

PIC10F220-E/OT

Manufacturer Part Number
PIC10F220-E/OT
Description
384B Flash, 16B RAM, 4 I/O, 8bit ADC 6 SOT-23 BAG
Manufacturer
Microchip Technology
Series
PIC® 10Fr
Datasheet

Specifications of PIC10F220-E/OT

Processor Series
PIC10F
Core
RISC
Data Bus Width
8 bit
Program Memory Type
Flash
Program Memory Size
256 B
Data Ram Size
16 B
Interface Type
RS-232, USB
Maximum Clock Frequency
8 MHZ
Number Of Programmable I/os
4
Number Of Timers
1
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Package / Case
SOT-23-6
Operating Temperature Range
- 40 C to + 125 C
Processor To Be Evaluated
PIC10F220
Supply Current (max)
100 nA
Core Processor
PIC
Core Size
8-Bit
Speed
8MHz
Connectivity
-
Peripherals
POR, WDT
Number Of I /o
4
Eeprom Size
-
Ram Size
16 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Lead Free Status / Rohs Status
 Details
PIC10F220/222
4.3
Data memory is composed of registers or bytes of
RAM. Therefore, data memory for a device is specified
by its register file. The register file is divided into two
functional groups: Special Function Registers (SFR)
and General Purpose Registers (GPR).
The Special Function Registers include the TMR0 reg-
ister, the Program Counter (PCL), the STATUS register,
the I/O register (GPIO) and the File Select Register
(FSR). In addition, Special Function Registers are used
to control the I/O port configuration and prescaler
options.
The General Purpose Registers are used for data and
control information under command of the instructions.
For the PIC10F220, the register file is composed of 9
Special Function Registers and 16 General Purpose
Registers (Figure 4-3, Figure 4-4).
For the PIC10F222, the register file is composed of 9
Special Function Registers and 23 General Purpose
Registers (Figure 4-4).
4.3.1
The General Purpose Register file is accessed, either
directly or indirectly, through the File Select Register
(FSR). See Section 4.9 “Indirect Data Addressing;
INDF and FSR Registers”.
FIGURE 4-3:
DS41270E-page 14
Note 1: Not a physical register. See Section 4.9
File Address
Data Memory Organization
2: Unimplemented, read as 00h.
GENERAL PURPOSE REGISTER
FILE
“Indirect Data Addressing; INDF and
FSR Registers”.
00h
01h
02h
03h
04h
05h
06h
07h
0Fh
10h
1Fh
08h
09h
Unimplemented
PIC10F220 REGISTER
FILE MAP
ADCON0
Registers
Purpose
OSCCAL
General
ADRES
STATUS
INDF
TMR0
GPIO
PCL
FSR
(1)
(2)
FIGURE 4-4:
4.3.2
The Special Function Registers (SFRs) are registers
used by the CPU and peripheral functions to control the
operation of the device (Table 4-1).
The Special Function Registers can be classified into
two sets. The Special Function Registers associated
with the “core” functions are described in this section.
Those related to the operation of the peripheral
features are described in the section for each
peripheral feature.
Note 1: Not a physical register. See Section 4.9
File Address
SPECIAL FUNCTION REGISTERS
“Indirect Data Addressing; INDF and
FSR Registers”.
1Fh
00h
01h
02h
03h
04h
05h
06h
07h
08h
09h
PIC10F222 REGISTER
FILE MAP
© 2007 Microchip Technology Inc.
Registers
ADCON0
Purpose
OSCCAL
General
STATUS
ADRES
INDF
TMR0
GPIO
PCL
FSR
(1)

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