K4S643232H-UC60 Samsung Semiconductor, K4S643232H-UC60 Datasheet - Page 19
K4S643232H-UC60
Manufacturer Part Number
K4S643232H-UC60
Description
Manufacturer
Samsung Semiconductor
Type
SDRAMr
Datasheet
1.K4S643232H-UC60.pdf
(28 pages)
Specifications of K4S643232H-UC60
Organization
2Mx32
Density
64Mb
Address Bus
13b
Access Time (max)
6/5.5ns
Maximum Clock Rate
166MHz
Operating Supply Voltage (typ)
3.3V
Package Type
TSOP-II
Operating Temp Range
0C to 70C
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
Supply Current
150mA
Pin Count
86
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Lead Free Status / Rohs Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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Part Number:
K4S643232H-UC60
Manufacturer:
SAMSUNG
Quantity:
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Part Number:
K4S643232H-UC60
Manufacturer:
SAMSUNG
Quantity:
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Manufacturer:
SAMSUNG
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Company:
Part Number:
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Manufacturer:
SAMSUNG/41
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70
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Manufacturer:
SUMSUNG
Quantity:
20 000
Company:
Part Number:
K4S643232H-UC60T
Manufacturer:
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Device Operation &
Timing Diagram
3. CAS Interrupt (I)
*Note : 1. By " Interrupt", It is meant to stop burst read/write by external command before the end of burst.
DQ(CL2)
DQ(CL3)
1) Read interrupted by Read (BL=4)
2) Write interrupted by Write (BL=2)
CMD
CMD
CLK
ADD
ADD
CLK
DQ
2. t
3. t
By "CAS Interrupt", to stop burst read/write by CAS access ; read and write.
CCD
CDL
: Last data in to new column address delay. (=1CLK)
: CAS to CAS delay. (=1CLK)
DA
WR
RD
A
A
tCCD
Note 2
tCCD
tCDL
Note 3
0
DB
WR
RD
B
B
0
Note 2
QA
DB
Note 1
0
1
QB
QA
0
0
QB
QB
1
0
QB
QB
2
1
DQ(CL2)
DQ(CL3)
QB
QB
3
2
3) Write interrupted by Read (BL=2)
QB
3
- 19
DA
DA
WR
A
tCCD
tCDL
Note 3
0
0
RD
B
Note 2
QB
0
QB
QB
0
1
QB
Rev. 1.2 April 2006
1
x32 SDRAM